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drm/bridge: Prepare Analogix anx6345 support
Add bit definitions required for the anx6345 and add a sanity check in anx_dp_aux_transfer. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Torsten Duwe <duwe@suse.de> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20191107135218.01C2168C4E@verein.lst.de
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@ -116,7 +116,7 @@ ssize_t anx_dp_aux_transfer(struct regmap *map_dptx,
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else /* For non-zero-sized set the length field. */
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ctrl1 |= (msg->size - 1) << SP_AUX_LENGTH_SHIFT;
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if ((msg->request & DP_AUX_I2C_READ) == 0) {
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if ((msg->size > 0) && ((msg->request & DP_AUX_I2C_READ) == 0)) {
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/* When WRITE | MOT write values to data buffer */
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err = regmap_bulk_write(map_dptx,
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SP_DP_BUF_DATA0_REG, buffer,
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@ -72,7 +72,11 @@
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#define SP_CHA_STA BIT(2)
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/* Bits for DP System Control Register 3 */
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#define SP_HPD_STATUS BIT(6)
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#define SP_HPD_FORCE BIT(5)
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#define SP_HPD_CTRL BIT(4)
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#define SP_STRM_VALID BIT(2)
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#define SP_STRM_FORCE BIT(1)
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#define SP_STRM_CTRL BIT(0)
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/* Bits for DP System Control Register 4 */
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#define SP_ENHANCED_MODE BIT(3)
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@ -117,6 +121,9 @@
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#define SP_LINK_BW_SET_MASK 0x1f
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#define SP_INITIAL_SLIM_M_AUD_SEL BIT(5)
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/* DP Lane Count Setting Register */
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#define SP_DP_LANE_COUNT_SET_REG 0xa1
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/* DP Training Pattern Set Register */
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#define SP_DP_TRAINING_PATTERN_SET_REG 0xa2
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@ -130,6 +137,7 @@
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/* DP Link Training Control Register */
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#define SP_DP_LT_CTRL_REG 0xa8
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#define SP_DP_LT_INPROGRESS 0x80
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#define SP_LT_ERROR_TYPE_MASK 0x70
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# define SP_LT_NO_ERROR 0x00
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# define SP_LT_AUX_WRITE_ERROR 0x01
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@ -177,6 +177,9 @@
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#define SP_VBIT BIT(1)
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#define SP_AUDIO_LAYOUT BIT(0)
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/* Analog Debug Register 1 */
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#define SP_ANALOG_DEBUG1_REG 0xdc
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/* Analog Debug Register 2 */
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#define SP_ANALOG_DEBUG2_REG 0xdd
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#define SP_FORCE_SW_OFF_BYPASS 0x20
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