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ice: Add support for unified NVM update flow capability
Extends function parsing response from Discover Device Capability AQC to check if the device supports unified NVM update flow. Signed-off-by: Jacek Naczyk <jacek.naczyk@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -109,6 +109,7 @@ struct ice_aqc_list_caps_elem {
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#define ICE_AQC_CAPS_MSIX 0x0043
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#define ICE_AQC_CAPS_FD 0x0045
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#define ICE_AQC_CAPS_MAX_MTU 0x0047
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#define ICE_AQC_CAPS_NVM_MGMT 0x0080
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u8 major_ver;
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u8 minor_ver;
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@ -1857,6 +1857,13 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
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"%s: msix_vector_first_id = %d\n", prefix,
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caps->msix_vector_first_id);
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break;
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case ICE_AQC_CAPS_NVM_MGMT:
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caps->nvm_unified_update =
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(number & ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?
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true : false;
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ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix,
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caps->nvm_unified_update);
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break;
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case ICE_AQC_CAPS_MAX_MTU:
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caps->max_mtu = number;
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ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n",
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@ -244,6 +244,9 @@ struct ice_hw_common_caps {
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u8 rss_table_entry_width; /* RSS Entry width in bits */
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u8 dcb;
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bool nvm_unified_update;
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#define ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT BIT(3)
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};
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/* Function specific capabilities */
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