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s390/perf: add perf register support for floating-point registers

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For correct unwinding of user space processes, the floating-point
register contents are required.  For example, leaf functions might
use fp registers to temporarily store the return address.

Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
Reviewed-and-tested-by: Thomas Richter <tmricht@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Hendrik Brueckner 2017-11-08 09:17:38 +01:00 committed by Martin Schwidefsky
parent 0da0017f72
commit de9954b75e
2 changed files with 51 additions and 1 deletions
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32
tools/perf/arch/s390/include/perf_regs.h
View File

@ -49,6 +49,38 @@ static inline const char *perf_reg_name(int id)
return "R14"; return "R14";
case PERF_REG_S390_R15: case PERF_REG_S390_R15:
return "R15"; return "R15";
case PERF_REG_S390_FP0:
return "FP0";
case PERF_REG_S390_FP1:
return "FP1";
case PERF_REG_S390_FP2:
return "FP2";
case PERF_REG_S390_FP3:
return "FP3";
case PERF_REG_S390_FP4:
return "FP4";
case PERF_REG_S390_FP5:
return "FP5";
case PERF_REG_S390_FP6:
return "FP6";
case PERF_REG_S390_FP7:
return "FP7";
case PERF_REG_S390_FP8:
return "FP8";
case PERF_REG_S390_FP9:
return "FP9";
case PERF_REG_S390_FP10:
return "FP10";
case PERF_REG_S390_FP11:
return "FP11";
case PERF_REG_S390_FP12:
return "FP12";
case PERF_REG_S390_FP13:
return "FP13";
case PERF_REG_S390_FP14:
return "FP14";
case PERF_REG_S390_FP15:
return "FP15";
case PERF_REG_S390_MASK: case PERF_REG_S390_MASK:
return "MASK"; return "MASK";
case PERF_REG_S390_PC: case PERF_REG_S390_PC:

20
tools/perf/arch/s390/util/unwind-libdw.c
View File

@ -37,9 +37,27 @@ bool libdw__arch_set_initial_registers(Dwfl_Thread *thread, void *arg)
dwarf_regs[13] = REG(R13); dwarf_regs[13] = REG(R13);
dwarf_regs[14] = REG(R14); dwarf_regs[14] = REG(R14);
dwarf_regs[15] = REG(R15); dwarf_regs[15] = REG(R15);
dwarf_regs[16] = REG(FP0);
dwarf_regs[17] = REG(FP2);
dwarf_regs[18] = REG(FP4);
dwarf_regs[19] = REG(FP6);
dwarf_regs[20] = REG(FP1);
dwarf_regs[21] = REG(FP3);
dwarf_regs[22] = REG(FP5);
dwarf_regs[23] = REG(FP7);
dwarf_regs[24] = REG(FP8);
dwarf_regs[25] = REG(FP10);
dwarf_regs[26] = REG(FP12);
dwarf_regs[27] = REG(FP14);
dwarf_regs[28] = REG(FP9);
dwarf_regs[29] = REG(FP11);
dwarf_regs[30] = REG(FP13);
dwarf_regs[31] = REG(FP15);
dwarf_regs[64] = REG(MASK); dwarf_regs[64] = REG(MASK);
dwarf_regs[65] = REG(PC); dwarf_regs[65] = REG(PC);
dwfl_thread_state_register_pc(thread, dwarf_regs[65]); dwfl_thread_state_register_pc(thread, dwarf_regs[65]);
return dwfl_thread_state_registers(thread, 0, 16, dwarf_regs); return dwfl_thread_state_registers(thread, 0, 32, dwarf_regs);
} }