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drm/i915: Consolidate the timeline->barrier
The timeline is strictly ordered, so by inserting the timeline->barrier request into the timeline->last_request it naturally provides the same barrier. Consolidate the pair of barriers into one as they serve the same purpose. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190408091728.20207-4-chris@chris-wilson.co.uk
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@ -1167,7 +1167,7 @@ static int
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gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
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{
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struct drm_i915_private *i915 = ce->engine->i915;
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struct i915_request *rq, *prev;
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struct i915_request *rq;
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intel_wakeref_t wakeref;
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int ret;
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@ -1192,16 +1192,7 @@ gen8_modify_rpcs(struct intel_context *ce, struct intel_sseu sseu)
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}
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/* Queue this switch after all other activity by this context. */
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prev = i915_active_request_raw(&ce->ring->timeline->last_request,
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&i915->drm.struct_mutex);
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if (prev && !i915_request_completed(prev)) {
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ret = i915_request_await_dma_fence(rq, &prev->fence);
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if (ret < 0)
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goto out_add;
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}
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/* Order all following requests to be after. */
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ret = i915_timeline_set_barrier(ce->ring->timeline, rq);
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ret = i915_active_request_set(&ce->ring->timeline->last_request, rq);
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if (ret)
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goto out_add;
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@ -584,11 +584,6 @@ i915_request_alloc_slow(struct intel_context *ce)
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return kmem_cache_alloc(global.slab_requests, GFP_KERNEL);
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}
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static int add_timeline_barrier(struct i915_request *rq)
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{
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return i915_request_await_active_request(rq, &rq->timeline->barrier);
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}
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/**
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* i915_request_alloc - allocate a request structure
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*
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@ -738,10 +733,6 @@ i915_request_alloc(struct intel_engine_cs *engine, struct i915_gem_context *ctx)
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*/
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rq->head = rq->ring->emit;
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ret = add_timeline_barrier(rq);
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if (ret)
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goto err_unwind;
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ret = engine->request_alloc(rq);
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if (ret)
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goto err_unwind;
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@ -253,7 +253,6 @@ int i915_timeline_init(struct drm_i915_private *i915,
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spin_lock_init(&timeline->lock);
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mutex_init(&timeline->mutex);
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INIT_ACTIVE_REQUEST(&timeline->barrier);
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INIT_ACTIVE_REQUEST(&timeline->last_request);
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INIT_LIST_HEAD(&timeline->requests);
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@ -326,7 +325,6 @@ void i915_timeline_fini(struct i915_timeline *timeline)
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{
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GEM_BUG_ON(timeline->pin_count);
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GEM_BUG_ON(!list_empty(&timeline->requests));
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GEM_BUG_ON(i915_active_request_isset(&timeline->barrier));
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i915_syncmap_free(&timeline->sync);
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@ -110,19 +110,4 @@ void i915_timelines_init(struct drm_i915_private *i915);
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void i915_timelines_park(struct drm_i915_private *i915);
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void i915_timelines_fini(struct drm_i915_private *i915);
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/**
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* i915_timeline_set_barrier - orders submission between different timelines
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* @timeline: timeline to set the barrier on
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* @rq: request after which new submissions can proceed
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*
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* Sets the passed in request as the serialization point for all subsequent
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* submissions on @timeline. Subsequent requests will not be submitted to GPU
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* until the barrier has been completed.
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*/
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static inline int
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i915_timeline_set_barrier(struct i915_timeline *tl, struct i915_request *rq)
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{
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return i915_active_request_set(&tl->barrier, rq);
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}
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#endif
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@ -61,16 +61,6 @@ struct i915_timeline {
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*/
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struct i915_syncmap *sync;
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/**
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* Barrier provides the ability to serialize ordering between different
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* timelines.
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*
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* Users can call i915_timeline_set_barrier which will make all
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* subsequent submissions to this timeline be executed only after the
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* barrier has been completed.
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*/
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struct i915_active_request barrier;
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struct list_head link;
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struct drm_i915_private *i915;
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@ -16,7 +16,6 @@ void mock_timeline_init(struct i915_timeline *timeline, u64 context)
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spin_lock_init(&timeline->lock);
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mutex_init(&timeline->mutex);
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INIT_ACTIVE_REQUEST(&timeline->barrier);
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INIT_ACTIVE_REQUEST(&timeline->last_request);
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INIT_LIST_HEAD(&timeline->requests);
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