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drm/i915/psr: use intel_de_*() functions for register access
The implicit "dev_priv" local variable use has been a long-standing pain point in the register access macros I915_READ(), I915_WRITE(), POSTING_READ(), I915_READ_FW(), and I915_WRITE_FW(). Replace them with the corresponding new display engine register accessors intel_de_read(), intel_de_write(), intel_de_posting_read(), intel_de_read_fw(), and intel_de_write_fw(). No functional changes. Generated using the following semantic patch: @@ expression REG, OFFSET; @@ - I915_READ(REG) + intel_de_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - POSTING_READ(REG) + intel_de_posting_read(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_WRITE(REG, OFFSET) + intel_de_write(dev_priv, REG, OFFSET) @@ expression REG; @@ - I915_READ_FW(REG) + intel_de_read_fw(dev_priv, REG) @@ expression REG, OFFSET; @@ - I915_WRITE_FW(REG, OFFSET) + intel_de_write_fw(dev_priv, REG, OFFSET) Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/652e16e6168691f89b5cb8c91278a0d960f8f1a9.1580149467.git.jani.nikula@intel.com
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@ -832,11 +832,11 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
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* TODO: if future platforms supports DC3CO in more than one
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* transcoder, EXITLINE will need to be unset when disabling PSR
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*/
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val = I915_READ(EXITLINE(cpu_transcoder));
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val = intel_de_read(dev_priv, EXITLINE(cpu_transcoder));
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val &= ~EXITLINE_MASK;
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val |= crtc_state->dc3co_exitline << EXITLINE_SHIFT;
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val |= EXITLINE_ENABLE;
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I915_WRITE(EXITLINE(cpu_transcoder), val);
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intel_de_write(dev_priv, EXITLINE(cpu_transcoder), val);
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}
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}
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