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sh: rework nommu for generic cache.c use.

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This does a bit of reorganizing for allowing nommu to use the new
and generic cache.c, no functional changes.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-08-15 09:49:32 +09:00
parent cbbe2f68f6
commit dde5e3ffb7
7 changed files with 4 additions and 18 deletions
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2
arch/sh/include/asm/cacheflush.h
View File

@ -76,5 +76,7 @@ void kmap_coherent_init(void);
void *kmap_coherent(struct page *page, unsigned long addr);
void kunmap_coherent(void);
#define PG_dcache_dirty PG_arch_1
#endif /* __KERNEL__ */
#endif /* __ASM_SH_CACHEFLUSH_H */

7
arch/sh/include/asm/page.h
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@ -68,18 +68,13 @@ extern void clear_user_page(void *to, unsigned long address, struct page *page);
extern void copy_user_page(void *to, void *from, unsigned long address,
struct page *page);
#elif defined(CONFIG_MMU)
#else
extern void copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr, struct vm_area_struct *vma);
#define __HAVE_ARCH_COPY_USER_HIGHPAGE
extern void clear_user_highpage(struct page *page, unsigned long vaddr);
#define clear_user_highpage clear_user_highpage
#else
#define clear_user_page(page, vaddr, pg) clear_page(page)
#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
#endif
/*

2
arch/sh/include/cpu-sh3/cpu/cacheflush.h
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@ -15,8 +15,6 @@
* SH4. Unlike the SH4 this is a unified cache so we need to do some work
* in mmap when 'exec'ing a new binary
*/
#define PG_dcache_dirty PG_arch_1
void flush_cache_all(void);
void flush_cache_mm(struct mm_struct *mm);
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)

2
arch/sh/include/cpu-sh4/cpu/cacheflush.h
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@ -38,6 +38,4 @@ void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
/* Initialization of P3 area for copy_user_page */
void p3_cache_init(void);
#define PG_dcache_dirty PG_arch_1
#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */

2
arch/sh/kernel/cpu/init.c
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@ -268,11 +268,9 @@ asmlinkage void __init sh_cpu_init(void)
cache_init();
if (raw_smp_processor_id() == 0) {
#ifdef CONFIG_MMU
shm_align_mask = max_t(unsigned long,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
#endif
/* Boot CPU sets the cache shape */
detect_cache_shape();

2
arch/sh/mm/mmap.c
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@ -14,10 +14,10 @@
#include <asm/page.h>
#include <asm/processor.h>
#ifdef CONFIG_MMU
unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
EXPORT_SYMBOL(shm_align_mask);
#ifdef CONFIG_MMU
/*
* To avoid cache aliases, we map the shared page with same color.
*/

5
arch/sh/mm/tlb-nommu.c
View File

@ -50,11 +50,6 @@ void __update_tlb(struct vm_area_struct *vma, unsigned long address, pte_t pte)
{
}
void __update_cache(struct vm_area_struct *vma,
unsigned long address, pte_t pte)
{
}
void __init kmap_coherent_init(void)
{
}