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drm/amdgpu: add mmhub ras_late_init callback function (v2)

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The function will be called in late init phase to do mmhub
ras init

v2: check ras_late_init function pointer before invoking the
function

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Hawking Zhang 2019-08-30 13:34:38 +08:00 committed by Alex Deucher
parent 2452e7783c
commit dda79907a7
3 changed files with 35 additions and 22 deletions
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1
drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
View File

@ -23,6 +23,7 @@
struct amdgpu_mmhub_funcs {
void (*ras_init)(struct amdgpu_device *adev);
int (*ras_late_init)(struct amdgpu_device *adev);
void (*query_ras_error_count)(struct amdgpu_device *adev,
void *ras_error_status);
};

26
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
View File

@ -766,7 +766,6 @@ static int gmc_v9_0_ecc_late_init(void *handle)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct ras_ih_if mmhub_ih_info;
struct ras_fs_if umc_fs_info = {
.sysfs_name = "umc_err_count",
.debugfs_name = "umc_err_inject",
@ -774,10 +773,6 @@ static int gmc_v9_0_ecc_late_init(void *handle)
struct ras_ih_if umc_ih_info = {
.cb = gmc_v9_0_process_ras_data_cb,
};
struct ras_fs_if mmhub_fs_info = {
.sysfs_name = "mmhub_err_count",
.debugfs_name = "mmhub_err_inject",
};
if (!adev->gmc.umc_ras_if) {
adev->gmc.umc_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
@ -801,29 +796,16 @@ static int gmc_v9_0_ecc_late_init(void *handle)
goto umc_late_fini;
}
if (!adev->gmc.mmhub_ras_if) {
adev->gmc.mmhub_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
if (!adev->gmc.mmhub_ras_if)
return -ENOMEM;
adev->gmc.mmhub_ras_if->block = AMDGPU_RAS_BLOCK__MMHUB;
adev->gmc.mmhub_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->gmc.mmhub_ras_if->sub_block_index = 0;
strcpy(adev->gmc.mmhub_ras_if->name, "mmhub");
if (adev->mmhub_funcs->ras_late_init) {
r = adev->mmhub_funcs->ras_late_init(adev);
if (r)
return r;
}
mmhub_ih_info.head = mmhub_fs_info.head = *adev->gmc.mmhub_ras_if;
r = amdgpu_ras_late_init(adev, adev->gmc.mmhub_ras_if,
&mmhub_fs_info, &mmhub_ih_info);
if (r)
goto mmhub_late_fini;
return 0;
mmhub_late_fini:
amdgpu_ras_late_fini(adev, adev->gmc.mmhub_ras_if, &mmhub_ih_info);
umc_late_fini:
amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, &umc_ih_info);
free:
kfree(adev->gmc.umc_ras_if);
kfree(adev->gmc.mmhub_ras_if);
return r;
}

30
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
View File

@ -31,6 +31,7 @@
#include "vega10_enum.h"
#include "soc15_common.h"
#include "amdgpu_ras.h"
#define mmDAGB0_CNTL_MISC2_RV 0x008f
#define mmDAGB0_CNTL_MISC2_RV_BASE_IDX 0
@ -615,6 +616,35 @@ static void mmhub_v1_0_query_ras_error_count(struct amdgpu_device *adev,
}
}
static int mmhub_v1_0_ras_late_init(struct amdgpu_device *adev)
{
int r;
struct ras_ih_if mmhub_ih_info = {
.cb = NULL,
};
struct ras_fs_if mmhub_fs_info = {
.sysfs_name = "mmhub_err_count",
.debugfs_name = "mmhub_err_inject",
};
if (!adev->gmc.mmhub_ras_if) {
adev->gmc.mmhub_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
if (!adev->gmc.mmhub_ras_if)
return -ENOMEM;
adev->gmc.mmhub_ras_if->block = AMDGPU_RAS_BLOCK__MMHUB;
adev->gmc.mmhub_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
adev->gmc.mmhub_ras_if->sub_block_index = 0;
strcpy(adev->gmc.mmhub_ras_if->name, "mmhub");
}
mmhub_ih_info.head = mmhub_fs_info.head = *adev->gmc.mmhub_ras_if;
r = amdgpu_ras_late_init(adev, adev->gmc.mmhub_ras_if,
&mmhub_fs_info, &mmhub_ih_info);
if (r)
kfree(adev->gmc.mmhub_ras_if);
return r;
}
const struct amdgpu_mmhub_funcs mmhub_v1_0_funcs = {
.ras_late_init = mmhub_v1_0_ras_late_init,
.query_ras_error_count = mmhub_v1_0_query_ras_error_count,
};