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drm/i915: Reorder await_execution before await_request
Reorder the code so that we can reuse the await_execution from a special
case in await_request in the next patch.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200526090753.11329-1-chris@chris-wilson.co.uk
(cherry picked from commit ffb0c600c2)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
This commit is contained in:
Chris Wilson
Joonas Lahtinen
parent
757a9395f3
commit
dd873dd51d
@ -1053,148 +1053,6 @@ emit_semaphore_wait(struct i915_request *to,
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I915_FENCE_GFP);
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}
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static int
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i915_request_await_request(struct i915_request *to, struct i915_request *from)
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{
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int ret;
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GEM_BUG_ON(to == from);
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GEM_BUG_ON(to->timeline == from->timeline);
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if (i915_request_completed(from)) {
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i915_sw_fence_set_error_once(&to->submit, from->fence.error);
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return 0;
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}
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if (to->engine->schedule) {
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ret = i915_sched_node_add_dependency(&to->sched,
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&from->sched,
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I915_DEPENDENCY_EXTERNAL);
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if (ret < 0)
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return ret;
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}
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if (to->engine == from->engine)
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ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
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&from->submit,
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I915_FENCE_GFP);
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else
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ret = emit_semaphore_wait(to, from, I915_FENCE_GFP);
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if (ret < 0)
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return ret;
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return 0;
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}
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static void mark_external(struct i915_request *rq)
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{
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/*
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* The downside of using semaphores is that we lose metadata passing
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* along the signaling chain. This is particularly nasty when we
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* need to pass along a fatal error such as EFAULT or EDEADLK. For
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* fatal errors we want to scrub the request before it is executed,
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* which means that we cannot preload the request onto HW and have
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* it wait upon a semaphore.
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*/
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rq->sched.flags |= I915_SCHED_HAS_EXTERNAL_CHAIN;
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}
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static int
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__i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
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{
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mark_external(rq);
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return i915_sw_fence_await_dma_fence(&rq->submit, fence,
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i915_fence_context_timeout(rq->i915,
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fence->context),
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I915_FENCE_GFP);
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}
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static int
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i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
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{
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struct dma_fence *iter;
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int err = 0;
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if (!to_dma_fence_chain(fence))
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return __i915_request_await_external(rq, fence);
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dma_fence_chain_for_each(iter, fence) {
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struct dma_fence_chain *chain = to_dma_fence_chain(iter);
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if (!dma_fence_is_i915(chain->fence)) {
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err = __i915_request_await_external(rq, iter);
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break;
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}
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err = i915_request_await_dma_fence(rq, chain->fence);
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if (err < 0)
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break;
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}
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dma_fence_put(iter);
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return err;
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}
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int
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i915_request_await_dma_fence(struct i915_request *rq, struct dma_fence *fence)
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{
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struct dma_fence **child = &fence;
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unsigned int nchild = 1;
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int ret;
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/*
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* Note that if the fence-array was created in signal-on-any mode,
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* we should *not* decompose it into its individual fences. However,
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* we don't currently store which mode the fence-array is operating
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* in. Fortunately, the only user of signal-on-any is private to
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* amdgpu and we should not see any incoming fence-array from
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* sync-file being in signal-on-any mode.
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*/
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if (dma_fence_is_array(fence)) {
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struct dma_fence_array *array = to_dma_fence_array(fence);
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child = array->fences;
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nchild = array->num_fences;
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GEM_BUG_ON(!nchild);
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}
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do {
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fence = *child++;
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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i915_sw_fence_set_error_once(&rq->submit, fence->error);
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continue;
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}
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/*
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* Requests on the same timeline are explicitly ordered, along
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* with their dependencies, by i915_request_add() which ensures
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* that requests are submitted in-order through each ring.
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*/
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if (fence->context == rq->fence.context)
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continue;
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/* Squash repeated waits to the same timelines */
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if (fence->context &&
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intel_timeline_sync_is_later(i915_request_timeline(rq),
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fence))
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continue;
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if (dma_fence_is_i915(fence))
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ret = i915_request_await_request(rq, to_request(fence));
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else
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ret = i915_request_await_external(rq, fence);
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if (ret < 0)
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return ret;
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/* Record the latest fence used against each timeline */
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if (fence->context)
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intel_timeline_sync_set(i915_request_timeline(rq),
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fence);
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} while (--nchild);
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return 0;
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}
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static bool intel_timeline_sync_has_start(struct intel_timeline *tl,
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struct dma_fence *fence)
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{
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@ -1282,6 +1140,55 @@ __i915_request_await_execution(struct i915_request *to,
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&from->fence);
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}
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static void mark_external(struct i915_request *rq)
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{
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/*
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* The downside of using semaphores is that we lose metadata passing
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* along the signaling chain. This is particularly nasty when we
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* need to pass along a fatal error such as EFAULT or EDEADLK. For
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* fatal errors we want to scrub the request before it is executed,
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* which means that we cannot preload the request onto HW and have
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* it wait upon a semaphore.
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*/
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rq->sched.flags |= I915_SCHED_HAS_EXTERNAL_CHAIN;
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}
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static int
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__i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
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{
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mark_external(rq);
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return i915_sw_fence_await_dma_fence(&rq->submit, fence,
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i915_fence_context_timeout(rq->i915,
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fence->context),
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I915_FENCE_GFP);
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}
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static int
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i915_request_await_external(struct i915_request *rq, struct dma_fence *fence)
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{
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struct dma_fence *iter;
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int err = 0;
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if (!to_dma_fence_chain(fence))
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return __i915_request_await_external(rq, fence);
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dma_fence_chain_for_each(iter, fence) {
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struct dma_fence_chain *chain = to_dma_fence_chain(iter);
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if (!dma_fence_is_i915(chain->fence)) {
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err = __i915_request_await_external(rq, iter);
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break;
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}
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err = i915_request_await_dma_fence(rq, chain->fence);
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if (err < 0)
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break;
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}
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dma_fence_put(iter);
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return err;
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}
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int
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i915_request_await_execution(struct i915_request *rq,
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struct dma_fence *fence,
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@ -1330,6 +1237,99 @@ i915_request_await_execution(struct i915_request *rq,
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return 0;
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}
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static int
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i915_request_await_request(struct i915_request *to, struct i915_request *from)
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{
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int ret;
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GEM_BUG_ON(to == from);
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GEM_BUG_ON(to->timeline == from->timeline);
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if (i915_request_completed(from)) {
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i915_sw_fence_set_error_once(&to->submit, from->fence.error);
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return 0;
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}
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if (to->engine->schedule) {
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ret = i915_sched_node_add_dependency(&to->sched,
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&from->sched,
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I915_DEPENDENCY_EXTERNAL);
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if (ret < 0)
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return ret;
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}
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if (to->engine == READ_ONCE(from->engine))
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ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
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&from->submit,
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I915_FENCE_GFP);
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else
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ret = emit_semaphore_wait(to, from, I915_FENCE_GFP);
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if (ret < 0)
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return ret;
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return 0;
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}
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int
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i915_request_await_dma_fence(struct i915_request *rq, struct dma_fence *fence)
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{
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struct dma_fence **child = &fence;
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unsigned int nchild = 1;
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int ret;
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/*
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* Note that if the fence-array was created in signal-on-any mode,
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* we should *not* decompose it into its individual fences. However,
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* we don't currently store which mode the fence-array is operating
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* in. Fortunately, the only user of signal-on-any is private to
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* amdgpu and we should not see any incoming fence-array from
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* sync-file being in signal-on-any mode.
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*/
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if (dma_fence_is_array(fence)) {
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struct dma_fence_array *array = to_dma_fence_array(fence);
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child = array->fences;
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nchild = array->num_fences;
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GEM_BUG_ON(!nchild);
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}
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do {
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fence = *child++;
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
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i915_sw_fence_set_error_once(&rq->submit, fence->error);
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continue;
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}
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/*
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* Requests on the same timeline are explicitly ordered, along
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* with their dependencies, by i915_request_add() which ensures
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* that requests are submitted in-order through each ring.
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*/
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if (fence->context == rq->fence.context)
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continue;
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/* Squash repeated waits to the same timelines */
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if (fence->context &&
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intel_timeline_sync_is_later(i915_request_timeline(rq),
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fence))
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continue;
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if (dma_fence_is_i915(fence))
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ret = i915_request_await_request(rq, to_request(fence));
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else
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ret = i915_request_await_external(rq, fence);
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if (ret < 0)
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return ret;
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/* Record the latest fence used against each timeline */
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if (fence->context)
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intel_timeline_sync_set(i915_request_timeline(rq),
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fence);
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} while (--nchild);
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return 0;
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}
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/**
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* i915_request_await_object - set this request to (async) wait upon a bo
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* @to: request we are wishing to use
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