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phy: phy-pxa-28nm-usb2: convert to readl_poll_timeout()

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Use readl_poll_timeout() to simplify code

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/1598320987-25518-6-git-send-email-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Chunfeng Yun 2020-08-25 10:03:07 +08:00 committed by Vinod Koul
parent f63602b1c6
commit dce9d8129e
1 changed files with 15 additions and 18 deletions
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33
drivers/phy/marvell/phy-pxa-28nm-usb2.c
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@ -13,6 +13,7 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/clk.h> #include <linux/clk.h>
#include <linux/module.h> #include <linux/module.h>
@ -138,15 +139,12 @@ struct mv_usb2_phy {
struct clk *clk; struct clk *clk;
}; };
static bool wait_for_reg(void __iomem *reg, u32 mask, unsigned long timeout) static int wait_for_reg(void __iomem *reg, u32 mask, u32 ms)
{ {
timeout += jiffies; u32 val;
while (time_is_after_eq_jiffies(timeout)) {
if ((readl(reg) & mask) == mask) return readl_poll_timeout(reg, val, ((val & mask) == mask),
return true; 1000, 1000 * ms);
msleep(1);
}
return false;
} }
static int mv_usb2_phy_28nm_init(struct phy *phy) static int mv_usb2_phy_28nm_init(struct phy *phy)
@ -208,24 +206,23 @@ static int mv_usb2_phy_28nm_init(struct phy *phy)
*/ */
/* Make sure PHY Calibration is ready */ /* Make sure PHY Calibration is ready */
if (!wait_for_reg(base + PHY_28NM_CAL_REG, ret = wait_for_reg(base + PHY_28NM_CAL_REG,
PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE, PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE,
HZ / 10)) { 100);
if (ret) {
dev_warn(&pdev->dev, "USB PHY PLL calibrate not done after 100mS."); dev_warn(&pdev->dev, "USB PHY PLL calibrate not done after 100mS.");
ret = -ETIMEDOUT;
goto err_clk; goto err_clk;
} }
if (!wait_for_reg(base + PHY_28NM_RX_REG1, ret = wait_for_reg(base + PHY_28NM_RX_REG1,
PHY_28NM_RX_SQCAL_DONE, HZ / 10)) { PHY_28NM_RX_SQCAL_DONE, 100);
if (ret) {
dev_warn(&pdev->dev, "USB PHY RX SQ calibrate not done after 100mS."); dev_warn(&pdev->dev, "USB PHY RX SQ calibrate not done after 100mS.");
ret = -ETIMEDOUT;
goto err_clk; goto err_clk;
} }
/* Make sure PHY PLL is ready */ /* Make sure PHY PLL is ready */
if (!wait_for_reg(base + PHY_28NM_PLL_REG0, ret = wait_for_reg(base + PHY_28NM_PLL_REG0, PHY_28NM_PLL_READY, 100);
PHY_28NM_PLL_READY, HZ / 10)) { if (ret) {
dev_warn(&pdev->dev, "PLL_READY not set after 100mS."); dev_warn(&pdev->dev, "PLL_READY not set after 100mS.");
ret = -ETIMEDOUT;
goto err_clk; goto err_clk;
} }