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[ARM] 4126/1: Add the ARM specific barriers
There are three barriers - ISB, DMB and DSB for different scenarious. This patch adds their definitions in the system.h file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -193,11 +193,19 @@ extern unsigned int user_debug;
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#endif
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#if __LINUX_ARM_ARCH__ >= 6
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#define mb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
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: : "r" (0) : "memory")
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#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
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: : "r" (0) : "memory")
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#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
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: : "r" (0) : "memory")
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#else
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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#define isb() __asm__ __volatile__ ("" : : : "memory")
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#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#endif
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#define mb() dmb()
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#define rmb() mb()
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#define wmb() mb()
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#define read_barrier_depends() do { } while(0)
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