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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 18:33:18 +07:00
cxgb4: Added support in debugfs to dump sge_qinfo
Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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b8665c6c16
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@ -1029,6 +1029,8 @@ int cxgb4_t4_bar2_sge_qregs(struct adapter *adapter,
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u64 *pbar2_qoffset,
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unsigned int *pbar2_qid);
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unsigned int qtimer_val(const struct adapter *adap,
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const struct sge_rspq *q);
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int t4_init_sge_params(struct adapter *adapter);
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int t4_init_tp_params(struct adapter *adap);
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int t4_filter_field_shift(const struct adapter *adap, int filter_sel);
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@ -1026,6 +1026,216 @@ static const struct file_operations rss_vf_config_debugfs_fops = {
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.release = seq_release_private
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};
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static int sge_qinfo_show(struct seq_file *seq, void *v)
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{
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struct adapter *adap = seq->private;
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int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
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int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
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int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
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int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
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int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
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int i, r = (uintptr_t)v - 1;
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int toe_idx = r - eth_entries;
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int rdma_idx = toe_idx - toe_entries;
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int ciq_idx = rdma_idx - rdma_entries;
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int ctrl_idx = ciq_idx - ciq_entries;
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int fq_idx = ctrl_idx - ctrl_entries;
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if (r)
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seq_putc(seq, '\n');
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#define S3(fmt_spec, s, v) \
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do { \
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seq_printf(seq, "%-12s", s); \
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for (i = 0; i < n; ++i) \
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seq_printf(seq, " %16" fmt_spec, v); \
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seq_putc(seq, '\n'); \
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} while (0)
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#define S(s, v) S3("s", s, v)
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#define T(s, v) S3("u", s, tx[i].v)
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#define R(s, v) S3("u", s, rx[i].v)
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if (r < eth_entries) {
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int base_qset = r * 4;
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const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
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const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
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int n = min(4, adap->sge.ethqsets - 4 * r);
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S("QType:", "Ethernet");
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S("Interface:",
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rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
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T("TxQ ID:", q.cntxt_id);
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T("TxQ size:", q.size);
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T("TxQ inuse:", q.in_use);
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T("TxQ CIDX:", q.cidx);
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T("TxQ PIDX:", q.pidx);
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#ifdef CONFIG_CXGB4_DCB
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T("DCB Prio:", dcb_prio);
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S3("u", "DCB PGID:",
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(ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
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4*(7-tx[i].dcb_prio)) & 0xf);
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S3("u", "DCB PFC:",
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(ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
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1*(7-tx[i].dcb_prio)) & 0x1);
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#endif
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R("RspQ ID:", rspq.abs_id);
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R("RspQ size:", rspq.size);
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R("RspQE size:", rspq.iqe_len);
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R("RspQ CIDX:", rspq.cidx);
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R("RspQ Gen:", rspq.gen);
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S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
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S3("u", "Intr pktcnt:",
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adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
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R("FL ID:", fl.cntxt_id);
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R("FL size:", fl.size - 8);
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R("FL pend:", fl.pend_cred);
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R("FL avail:", fl.avail);
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R("FL PIDX:", fl.pidx);
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R("FL CIDX:", fl.cidx);
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} else if (toe_idx < toe_entries) {
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const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
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const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
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int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
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S("QType:", "TOE");
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T("TxQ ID:", q.cntxt_id);
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T("TxQ size:", q.size);
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T("TxQ inuse:", q.in_use);
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T("TxQ CIDX:", q.cidx);
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T("TxQ PIDX:", q.pidx);
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R("RspQ ID:", rspq.abs_id);
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R("RspQ size:", rspq.size);
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R("RspQE size:", rspq.iqe_len);
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R("RspQ CIDX:", rspq.cidx);
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R("RspQ Gen:", rspq.gen);
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S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
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S3("u", "Intr pktcnt:",
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adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
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R("FL ID:", fl.cntxt_id);
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R("FL size:", fl.size - 8);
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R("FL pend:", fl.pend_cred);
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R("FL avail:", fl.avail);
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R("FL PIDX:", fl.pidx);
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R("FL CIDX:", fl.cidx);
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} else if (rdma_idx < rdma_entries) {
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const struct sge_ofld_rxq *rx =
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&adap->sge.rdmarxq[rdma_idx * 4];
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int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
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S("QType:", "RDMA-CPL");
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R("RspQ ID:", rspq.abs_id);
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R("RspQ size:", rspq.size);
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R("RspQE size:", rspq.iqe_len);
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R("RspQ CIDX:", rspq.cidx);
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R("RspQ Gen:", rspq.gen);
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S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
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S3("u", "Intr pktcnt:",
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adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
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R("FL ID:", fl.cntxt_id);
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R("FL size:", fl.size - 8);
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R("FL pend:", fl.pend_cred);
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R("FL avail:", fl.avail);
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R("FL PIDX:", fl.pidx);
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R("FL CIDX:", fl.cidx);
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} else if (ciq_idx < ciq_entries) {
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const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
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int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
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S("QType:", "RDMA-CIQ");
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R("RspQ ID:", rspq.abs_id);
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R("RspQ size:", rspq.size);
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R("RspQE size:", rspq.iqe_len);
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R("RspQ CIDX:", rspq.cidx);
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R("RspQ Gen:", rspq.gen);
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S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
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S3("u", "Intr pktcnt:",
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adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
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} else if (ctrl_idx < ctrl_entries) {
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const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
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int n = min(4, adap->params.nports - 4 * ctrl_idx);
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S("QType:", "Control");
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T("TxQ ID:", q.cntxt_id);
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T("TxQ size:", q.size);
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T("TxQ inuse:", q.in_use);
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T("TxQ CIDX:", q.cidx);
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T("TxQ PIDX:", q.pidx);
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} else if (fq_idx == 0) {
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const struct sge_rspq *evtq = &adap->sge.fw_evtq;
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seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
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seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
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seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
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seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
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seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
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seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
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seq_printf(seq, "%-12s %16u\n", "Intr delay:",
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qtimer_val(adap, evtq));
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seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
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adap->sge.counter_val[evtq->pktcnt_idx]);
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}
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#undef R
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#undef T
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#undef S
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#undef S3
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return 0;
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}
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static int sge_queue_entries(const struct adapter *adap)
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{
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return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
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DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
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DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
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DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
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DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
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}
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static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
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{
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int entries = sge_queue_entries(seq->private);
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return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
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}
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static void sge_queue_stop(struct seq_file *seq, void *v)
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{
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}
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static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
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{
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int entries = sge_queue_entries(seq->private);
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++*pos;
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return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
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}
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static const struct seq_operations sge_qinfo_seq_ops = {
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.start = sge_queue_start,
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.next = sge_queue_next,
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.stop = sge_queue_stop,
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.show = sge_qinfo_show
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};
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static int sge_qinfo_open(struct inode *inode, struct file *file)
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{
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int res = seq_open(file, &sge_qinfo_seq_ops);
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if (!res) {
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struct seq_file *seq = file->private_data;
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seq->private = inode->i_private;
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}
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return res;
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}
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static const struct file_operations sge_qinfo_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = sge_qinfo_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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};
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int mem_open(struct inode *inode, struct file *file)
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{
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unsigned int mem;
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@ -1135,6 +1345,7 @@ int t4_setup_debugfs(struct adapter *adap)
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{ "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
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{ "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
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{ "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
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{ "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
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#if IS_ENABLED(CONFIG_IPV6)
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{ "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
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#endif
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@ -2500,8 +2500,8 @@ static int closest_thres(const struct sge *s, int thres)
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/*
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* Return a queue's interrupt hold-off time in us. 0 means no timer.
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*/
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static unsigned int qtimer_val(const struct adapter *adap,
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const struct sge_rspq *q)
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unsigned int qtimer_val(const struct adapter *adap,
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const struct sge_rspq *q)
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{
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unsigned int idx = q->intr_params >> 1;
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