AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-18 06:26:49 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id

Browse Source 
When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved
to the internal non-exported bindings, but this clock is necessary and
mandatory for the SAR ADC bindings.

Export it back to the public bindings.

Fixes: be3d960b0a ("dt-bindings: clk: add G12A AO Clock and Reset Bindings")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
This commit is contained in:
Neil Armstrong 2019-03-04 11:53:58 +01:00
parent 58b5c8acba
commit dc6276f576
2 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/clk/meson/g12a-aoclk.h
View File

@ -16,7 +16,6 @@
* to expose, such as the internal muxes and dividers of composite clocks,
* will remain defined here.
*/
#define CLKID_AO_SAR_ADC_SEL 16
#define CLKID_AO_SAR_ADC_DIV 17
#define CLKID_AO_CTS_OSCIN 19
#define CLKID_AO_32K_PRE 20

1
include/dt-bindings/clock/g12a-aoclkc.h
View File

@ -26,6 +26,7 @@
#define CLKID_AO_M4_FCLK 13
#define CLKID_AO_M4_HCLK 14
#define CLKID_AO_CLK81 15
#define CLKID_AO_SAR_ADC_SEL 16
#define CLKID_AO_SAR_ADC_CLK 18
#define CLKID_AO_32K 23
#define CLKID_AO_CEC 27