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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mt76: store wcid tx rate info in one u32 reduce locking
Signed-off-by: Felix Fietkau <nbd@nbd.name>
This commit is contained in:
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2fe30dce08
commit
db9f11d343
@ -188,6 +188,11 @@ enum mt76_wcid_flags {
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DECLARE_EWMA(signal, 10, 8);
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#define MT_WCID_TX_INFO_RATE GENMASK(15, 0)
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#define MT_WCID_TX_INFO_NSS GENMASK(17, 16)
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#define MT_WCID_TX_INFO_TXPWR_ADJ GENMASK(25, 18)
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#define MT_WCID_TX_INFO_SET BIT(31)
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struct mt76_wcid {
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struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
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@ -206,10 +211,7 @@ struct mt76_wcid {
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u8 rx_check_pn;
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u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
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__le16 tx_rate;
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bool tx_rate_set;
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u8 tx_rate_nss;
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s8 max_txpwr_adj;
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u32 tx_info;
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bool sw_iv;
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u8 packet_id;
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@ -717,11 +717,11 @@ void mt7603_wtbl_set_rates(struct mt7603_dev *dev, struct mt7603_sta *sta,
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MT_WTBL_UPDATE_RATE_UPDATE |
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MT_WTBL_UPDATE_TX_COUNT_CLEAR);
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if (!sta->wcid.tx_rate_set)
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if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET))
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mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000);
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sta->rate_count = 2 * MT7603_RATE_RETRY * n_rates;
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sta->wcid.tx_rate_set = true;
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sta->wcid.tx_info |= MT_WCID_TX_INFO_SET;
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}
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static enum mt7603_cipher_type
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@ -218,10 +218,17 @@ mt76x02_mac_tx_rate_val(struct mt76x02_dev *dev,
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void mt76x02_mac_wcid_set_rate(struct mt76x02_dev *dev, struct mt76_wcid *wcid,
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const struct ieee80211_tx_rate *rate)
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{
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spin_lock_bh(&dev->mt76.lock);
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wcid->tx_rate = mt76x02_mac_tx_rate_val(dev, rate, &wcid->tx_rate_nss);
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wcid->tx_rate_set = true;
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spin_unlock_bh(&dev->mt76.lock);
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s8 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
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__le16 rateval;
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u32 tx_info;
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s8 nss;
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rateval = mt76x02_mac_tx_rate_val(dev, rate, &nss);
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tx_info = FIELD_PREP(MT_WCID_TX_INFO_RATE, rateval) |
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FIELD_PREP(MT_WCID_TX_INFO_NSS, nss) |
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FIELD_PREP(MT_WCID_TX_INFO_TXPWR_ADJ, max_txpwr_adj) |
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MT_WCID_TX_INFO_SET;
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wcid->tx_info = tx_info;
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}
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void mt76x02_mac_set_short_preamble(struct mt76x02_dev *dev, bool enable)
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@ -323,6 +330,7 @@ void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi,
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
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struct ieee80211_tx_rate *rate = &info->control.rates[0];
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struct ieee80211_key_conf *key = info->control.hw_key;
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u32 wcid_tx_info;
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u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
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u16 txwi_flags = 0;
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u8 nss;
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@ -357,16 +365,16 @@ void mt76x02_mac_write_txwi(struct mt76x02_dev *dev, struct mt76x02_txwi *txwi,
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txwi->eiv = *((__le32 *)&ccmp_pn[4]);
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}
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spin_lock_bh(&dev->mt76.lock);
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if (wcid && (rate->idx < 0 || !rate->count)) {
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txwi->rate = wcid->tx_rate;
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max_txpwr_adj = wcid->max_txpwr_adj;
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nss = wcid->tx_rate_nss;
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wcid_tx_info = wcid->tx_info;
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txwi->rate = FIELD_GET(MT_WCID_TX_INFO_RATE, wcid_tx_info);
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max_txpwr_adj = FIELD_GET(MT_WCID_TX_INFO_TXPWR_ADJ,
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wcid_tx_info);
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nss = FIELD_GET(MT_WCID_TX_INFO_NSS, wcid_tx_info);
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} else {
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txwi->rate = mt76x02_mac_tx_rate_val(dev, rate, &nss);
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max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, rate);
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}
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spin_unlock_bh(&dev->mt76.lock);
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txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, dev->mt76.txpower_conf,
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max_txpwr_adj);
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@ -572,7 +572,6 @@ void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
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rate.idx = rates->rate[0].idx;
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rate.flags = rates->rate[0].flags;
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mt76x02_mac_wcid_set_rate(dev, &msta->wcid, &rate);
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msta->wcid.max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(dev, &rate);
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}
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EXPORT_SYMBOL_GPL(mt76x02_sta_rate_tbl_update);
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@ -266,7 +266,7 @@ mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
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skb_set_queue_mapping(skb, qid);
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}
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if (!wcid->tx_rate_set)
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if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
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ieee80211_get_tx_rates(info->control.vif, sta, skb,
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info->control.rates, 1);
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@ -412,7 +412,7 @@ mt76_txq_send_burst(struct mt76_dev *dev, struct mt76_sw_queue *sq,
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}
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info = IEEE80211_SKB_CB(skb);
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if (!wcid->tx_rate_set)
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if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
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ieee80211_get_tx_rates(txq->vif, txq->sta, skb,
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info->control.rates, 1);
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tx_rate = info->control.rates[0];
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