mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 13:16:53 +07:00
wireless-drivers fixes for 4.14
Nothing really special standing out, all of these are important fixes which should go to 4.14. iwlwifi * fix support for 3168 device series * fix a potential crash when using FW debugging recording; * improve channel flags parsing to avoid warnings on too long traces * return -ENODATA when the temperature is not available, since the -EIO we were returning was causing fatal errors in userspace * avoid printing too many messages in dmesg when using monitor mode, since this can become very noisy and completely flood the logs brcmsmac * reduce stack usage to avoid frame size warnings with KASAN brcmfmac * add a check to avoid copying uninitialised memory rtlwifi: * fix a regression with rtl8821ae starting from v4.11 where connections was frequently lost -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJZ4GYHAAoJEG4XJFUm622bXf8H/3DJF5P02OzWIVMK376xUgVI feX8tsazK0/cCgxeMfp/K4Nb9umZHFTNd1Zs5mrx8DFJjL1ekXTz93GtfcJ+WFH5 sPwS+IVOf4IaBrSiNpqskJhln3GHp7A+eFgqbFQ+Is4/eQQBqt/lW6LZoyA5DI6X 80hOT4eZtHanKNFQHuSgOGHXttAB9AcnEJngvfToZCV1jqadeoPK1GZQ+6Xsot3g RU5gYxc4gN+d203KhUxEebzz8buyfCEPG1wFze/mazPcQJ+8IJjMNOl474atKslW dsbqak2gtl70weZHeh2PlYkNvTZbAbiWk9feaTGeuwAgwWDms1BJKUKRppfZdqE= =RA6K -----END PGP SIGNATURE----- Merge tag 'wireless-drivers-for-davem-2017-10-13' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers Kalle Valo says: ==================== wireless-drivers fixes for 4.14 Nothing really special standing out, all of these are important fixes which should go to 4.14. iwlwifi * fix support for 3168 device series * fix a potential crash when using FW debugging recording; * improve channel flags parsing to avoid warnings on too long traces * return -ENODATA when the temperature is not available, since the -EIO we were returning was causing fatal errors in userspace * avoid printing too many messages in dmesg when using monitor mode, since this can become very noisy and completely flood the logs brcmsmac * reduce stack usage to avoid frame size warnings with KASAN brcmfmac * add a check to avoid copying uninitialised memory rtlwifi: * fix a regression with rtl8821ae starting from v4.11 where connections was frequently lost ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
db5972c95d
@ -429,7 +429,8 @@ void brcmf_fweh_process_event(struct brcmf_pub *drvr,
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if (code != BRCMF_E_IF && !fweh->evt_handler[code])
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return;
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if (datalen > BRCMF_DCMD_MAXLEN)
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if (datalen > BRCMF_DCMD_MAXLEN ||
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datalen + sizeof(*event_packet) > packet_len)
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return;
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if (in_interrupt())
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@ -14764,8 +14764,8 @@ static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi)
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}
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static void
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *events, u8 *dlys,
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u8 len)
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wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, const u8 *events,
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const u8 *dlys, u8 len)
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{
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u32 t1_offset, t2_offset;
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u8 ctr;
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@ -15240,16 +15240,16 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi)
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static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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{
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u16 currband;
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s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
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s8 *lna1_gain_db = NULL;
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s8 *lna1_gain_db_2 = NULL;
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s8 *lna2_gain_db = NULL;
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s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
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s8 *tia_gain_db;
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s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
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s8 *tia_gainbits;
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u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
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u16 *rfseq_init_gain;
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static const s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 };
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const s8 *lna1_gain_db = NULL;
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const s8 *lna1_gain_db_2 = NULL;
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const s8 *lna2_gain_db = NULL;
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static const s8 tiaA_gain_db_rev7[] = { -9, -6, -3, 0, 3, 3, 3, 3, 3, 3 };
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const s8 *tia_gain_db;
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static const s8 tiaA_gainbits_rev7[] = { 0, 1, 2, 3, 4, 4, 4, 4, 4, 4 };
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const s8 *tia_gainbits;
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static const u16 rfseqA_init_gain_rev7[] = { 0x624f, 0x624f };
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const u16 *rfseq_init_gain;
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u16 init_gaincode;
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u16 clip1hi_gaincode;
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u16 clip1md_gaincode = 0;
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@ -15310,10 +15310,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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if ((freq <= 5080) || (freq == 5825)) {
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s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
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s8 lna1A_gain_db_2_rev7[] = {
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11, 17, 22, 25};
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s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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static const s8 lna1A_gain_db_rev7[] = { 11, 16, 20, 24 };
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static const s8 lna1A_gain_db_2_rev7[] = { 11, 17, 22, 25};
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static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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crsminu_th = 0x3e;
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lna1_gain_db = lna1A_gain_db_rev7;
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@ -15321,10 +15320,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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lna2_gain_db = lna2A_gain_db_rev7;
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} else if ((freq >= 5500) && (freq <= 5700)) {
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s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
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s8 lna1A_gain_db_2_rev7[] = {
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12, 18, 22, 26};
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s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
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static const s8 lna1A_gain_db_rev7[] = { 11, 17, 21, 25 };
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static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
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static const s8 lna2A_gain_db_rev7[] = { 1, 8, 12, 16 };
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crsminu_th = 0x45;
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clip1md_gaincode_B = 0x14;
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@ -15335,10 +15333,9 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi)
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lna2_gain_db = lna2A_gain_db_rev7;
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} else {
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s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
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s8 lna1A_gain_db_2_rev7[] = {
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12, 18, 22, 26};
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s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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static const s8 lna1A_gain_db_rev7[] = { 12, 18, 22, 26 };
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static const s8 lna1A_gain_db_2_rev7[] = { 12, 18, 22, 26};
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static const s8 lna2A_gain_db_rev7[] = { -1, 6, 10, 14 };
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crsminu_th = 0x41;
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lna1_gain_db = lna1A_gain_db_rev7;
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@ -15450,65 +15447,65 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
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NPHY_RFSEQ_CMD_CLR_HIQ_DIS,
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NPHY_RFSEQ_CMD_SET_HPF_BW
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};
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u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
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s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
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s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
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s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
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s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
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s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
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s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
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s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
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s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
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s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
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s8 *lna1_gain_db = NULL;
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s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
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s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
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s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
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s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
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s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
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s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
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s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
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s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
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s8 *lna2_gain_db = NULL;
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s8 tiaG_gain_db[] = {
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static const u8 rfseq_updategainu_dlys[] = { 10, 30, 1 };
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static const s8 lna1G_gain_db[] = { 7, 11, 16, 23 };
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static const s8 lna1G_gain_db_rev4[] = { 8, 12, 17, 25 };
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static const s8 lna1G_gain_db_rev5[] = { 9, 13, 18, 26 };
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static const s8 lna1G_gain_db_rev6[] = { 8, 13, 18, 25 };
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static const s8 lna1G_gain_db_rev6_224B0[] = { 10, 14, 19, 27 };
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static const s8 lna1A_gain_db[] = { 7, 11, 17, 23 };
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static const s8 lna1A_gain_db_rev4[] = { 8, 12, 18, 23 };
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static const s8 lna1A_gain_db_rev5[] = { 6, 10, 16, 21 };
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static const s8 lna1A_gain_db_rev6[] = { 6, 10, 16, 21 };
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const s8 *lna1_gain_db = NULL;
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static const s8 lna2G_gain_db[] = { -5, 6, 10, 14 };
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static const s8 lna2G_gain_db_rev5[] = { -3, 7, 11, 16 };
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static const s8 lna2G_gain_db_rev6[] = { -5, 6, 10, 14 };
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static const s8 lna2G_gain_db_rev6_224B0[] = { -5, 6, 10, 15 };
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static const s8 lna2A_gain_db[] = { -6, 2, 6, 10 };
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static const s8 lna2A_gain_db_rev4[] = { -5, 2, 6, 10 };
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static const s8 lna2A_gain_db_rev5[] = { -7, 0, 4, 8 };
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static const s8 lna2A_gain_db_rev6[] = { -7, 0, 4, 8 };
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const s8 *lna2_gain_db = NULL;
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static const s8 tiaG_gain_db[] = {
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0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A };
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s8 tiaA_gain_db[] = {
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static const s8 tiaA_gain_db[] = {
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0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 };
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s8 tiaA_gain_db_rev4[] = {
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static const s8 tiaA_gain_db_rev4[] = {
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0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
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s8 tiaA_gain_db_rev5[] = {
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static const s8 tiaA_gain_db_rev5[] = {
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0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
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s8 tiaA_gain_db_rev6[] = {
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static const s8 tiaA_gain_db_rev6[] = {
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0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d };
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s8 *tia_gain_db;
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s8 tiaG_gainbits[] = {
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const s8 *tia_gain_db;
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static const s8 tiaG_gainbits[] = {
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0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03 };
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s8 tiaA_gainbits[] = {
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static const s8 tiaA_gainbits[] = {
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0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06 };
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s8 tiaA_gainbits_rev4[] = {
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static const s8 tiaA_gainbits_rev4[] = {
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0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
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s8 tiaA_gainbits_rev5[] = {
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static const s8 tiaA_gainbits_rev5[] = {
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0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
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s8 tiaA_gainbits_rev6[] = {
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static const s8 tiaA_gainbits_rev6[] = {
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0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04 };
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s8 *tia_gainbits;
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s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
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s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
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u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
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u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
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u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
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u16 rfseqG_init_gain_rev5_elna[] = {
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const s8 *tia_gainbits;
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static const s8 lpf_gain_db[] = { 0x00, 0x06, 0x0c, 0x12, 0x12, 0x12 };
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static const s8 lpf_gainbits[] = { 0x00, 0x01, 0x02, 0x03, 0x03, 0x03 };
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static const u16 rfseqG_init_gain[] = { 0x613f, 0x613f, 0x613f, 0x613f };
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static const u16 rfseqG_init_gain_rev4[] = { 0x513f, 0x513f, 0x513f, 0x513f };
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static const u16 rfseqG_init_gain_rev5[] = { 0x413f, 0x413f, 0x413f, 0x413f };
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static const u16 rfseqG_init_gain_rev5_elna[] = {
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0x013f, 0x013f, 0x013f, 0x013f };
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u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
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u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
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u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
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u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
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u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
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u16 rfseqA_init_gain_rev4_elna[] = {
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static const u16 rfseqG_init_gain_rev6[] = { 0x513f, 0x513f };
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static const u16 rfseqG_init_gain_rev6_224B0[] = { 0x413f, 0x413f };
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static const u16 rfseqG_init_gain_rev6_elna[] = { 0x113f, 0x113f };
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static const u16 rfseqA_init_gain[] = { 0x516f, 0x516f, 0x516f, 0x516f };
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static const u16 rfseqA_init_gain_rev4[] = { 0x614f, 0x614f, 0x614f, 0x614f };
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static const u16 rfseqA_init_gain_rev4_elna[] = {
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0x314f, 0x314f, 0x314f, 0x314f };
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u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
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u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
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u16 *rfseq_init_gain;
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static const u16 rfseqA_init_gain_rev5[] = { 0x714f, 0x714f, 0x714f, 0x714f };
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static const u16 rfseqA_init_gain_rev6[] = { 0x714f, 0x714f };
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const u16 *rfseq_init_gain;
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u16 initG_gaincode = 0x627e;
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u16 initG_gaincode_rev4 = 0x527e;
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u16 initG_gaincode_rev5 = 0x427e;
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@ -15538,10 +15535,10 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
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u16 clip1mdA_gaincode_rev6 = 0x2084;
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u16 clip1md_gaincode = 0;
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u16 clip1loG_gaincode = 0x0074;
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u16 clip1loG_gaincode_rev5[] = {
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static const u16 clip1loG_gaincode_rev5[] = {
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0x0062, 0x0064, 0x006a, 0x106a, 0x106c, 0x1074, 0x107c, 0x207c
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};
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u16 clip1loG_gaincode_rev6[] = {
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static const u16 clip1loG_gaincode_rev6[] = {
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0x106a, 0x106c, 0x1074, 0x107c, 0x007e, 0x107e, 0x207e, 0x307e
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};
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u16 clip1loG_gaincode_rev6_224B0 = 0x1074;
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@ -16066,7 +16063,7 @@ static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi)
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static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
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{
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u8 rfseq_rx2tx_events[] = {
|
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static const u8 rfseq_rx2tx_events[] = {
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NPHY_RFSEQ_CMD_NOP,
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NPHY_RFSEQ_CMD_RXG_FBW,
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NPHY_RFSEQ_CMD_TR_SWITCH,
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@ -16076,7 +16073,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
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NPHY_RFSEQ_CMD_EXT_PA
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};
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u8 rfseq_rx2tx_dlys[] = { 8, 6, 6, 2, 4, 60, 1 };
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u8 rfseq_tx2rx_events[] = {
|
||||
static const u8 rfseq_tx2rx_events[] = {
|
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NPHY_RFSEQ_CMD_NOP,
|
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NPHY_RFSEQ_CMD_EXT_PA,
|
||||
NPHY_RFSEQ_CMD_TX_GAIN,
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@ -16085,8 +16082,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
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NPHY_RFSEQ_CMD_RXG_FBW,
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NPHY_RFSEQ_CMD_CLR_HIQ_DIS
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};
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u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
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u8 rfseq_tx2rx_events_rev3[] = {
|
||||
static const u8 rfseq_tx2rx_dlys[] = { 8, 6, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_EXT_PA,
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||||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
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NPHY_REV3_RFSEQ_CMD_TX_GAIN,
|
||||
@ -16096,7 +16093,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
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NPHY_REV3_RFSEQ_CMD_CLR_HIQ_DIS,
|
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NPHY_REV3_RFSEQ_CMD_END
|
||||
};
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u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
static const u8 rfseq_tx2rx_dlys_rev3[] = { 8, 4, 2, 2, 4, 4, 6, 1 };
|
||||
u8 rfseq_rx2tx_events_rev3[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
@ -16110,7 +16107,7 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3[] = { 8, 6, 6, 4, 4, 18, 42, 1, 1 };
|
||||
|
||||
u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
static const u8 rfseq_rx2tx_events_rev3_ipa[] = {
|
||||
NPHY_REV3_RFSEQ_CMD_NOP,
|
||||
NPHY_REV3_RFSEQ_CMD_RXG_FBW,
|
||||
NPHY_REV3_RFSEQ_CMD_TR_SWITCH,
|
||||
@ -16121,15 +16118,15 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
NPHY_REV3_RFSEQ_CMD_INT_PA_PU,
|
||||
NPHY_REV3_RFSEQ_CMD_END
|
||||
};
|
||||
u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
static const u8 rfseq_rx2tx_dlys_rev3_ipa[] = { 8, 6, 6, 4, 4, 16, 43, 1, 1 };
|
||||
static const u16 rfseq_rx2tx_dacbufpu_rev7[] = { 0x10f, 0x10f };
|
||||
|
||||
s16 alpha0, alpha1, alpha2;
|
||||
s16 beta0, beta1, beta2;
|
||||
u32 leg_data_weights, ht_data_weights, nss1_data_weights,
|
||||
stbc_data_weights;
|
||||
u8 chan_freq_range = 0;
|
||||
u16 dac_control = 0x0002;
|
||||
static const u16 dac_control = 0x0002;
|
||||
u16 aux_adc_vmid_rev7_core0[] = { 0x8e, 0x96, 0x96, 0x96 };
|
||||
u16 aux_adc_vmid_rev7_core1[] = { 0x8f, 0x9f, 0x9f, 0x96 };
|
||||
u16 aux_adc_vmid_rev4[] = { 0xa2, 0xb4, 0xb4, 0x89 };
|
||||
@ -16139,8 +16136,8 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
u16 aux_adc_gain_rev4[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 aux_adc_gain_rev3[] = { 0x02, 0x02, 0x02, 0x00 };
|
||||
u16 *aux_adc_gain;
|
||||
u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
static const u16 sk_adc_vmid[] = { 0xb4, 0xb4, 0xb4, 0x24 };
|
||||
static const u16 sk_adc_gain[] = { 0x02, 0x02, 0x02, 0x02 };
|
||||
s32 min_nvar_val = 0x18d;
|
||||
s32 min_nvar_offset_6mbps = 20;
|
||||
u8 pdetrange;
|
||||
@ -16151,9 +16148,9 @@ static void wlc_phy_workarounds_nphy(struct brcms_phy *pi)
|
||||
u16 rfseq_rx2tx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_tx2rx_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_pktgn_lpf_h_hpc_rev7 = 0x77;
|
||||
u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_htpktgn_lpf_hpc_rev7[] = { 0x77, 0x11, 0x11 };
|
||||
static const u16 rfseq_pktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
static const u16 rfseq_cckpktgn_lpf_hpc_rev7[] = { 0x11, 0x11 };
|
||||
u16 ipalvlshift_3p3_war_en = 0;
|
||||
u16 rccal_bcap_val, rccal_scap_val;
|
||||
u16 rccal_tx20_11b_bcap = 0;
|
||||
@ -24291,13 +24288,13 @@ static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core)
|
||||
u16 bbmult;
|
||||
u16 tblentry;
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_lo[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5},
|
||||
{25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7}
|
||||
};
|
||||
|
||||
struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
static const struct nphy_txiqcal_ladder ladder_iq[] = {
|
||||
{3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0},
|
||||
{25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1},
|
||||
{100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7}
|
||||
@ -25773,67 +25770,67 @@ wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain,
|
||||
u16 cal_gain[2];
|
||||
struct nphy_iqcal_params cal_params[2];
|
||||
u32 tbl_len;
|
||||
void *tbl_ptr;
|
||||
const void *tbl_ptr;
|
||||
bool ladder_updated[2];
|
||||
u8 mphase_cal_lastphase = 0;
|
||||
int bcmerror = 0;
|
||||
bool phyhang_avoid_state = false;
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
|
||||
0x0300, 0x0500, 0x0700, 0x0900, 0x0d00, 0x1100, 0x1900, 0x1901,
|
||||
0x1902,
|
||||
0x1903, 0x1904, 0x1905, 0x1906, 0x1907, 0x2407, 0x3207, 0x4607,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
|
||||
0x0200, 0x0300, 0x0600, 0x0900, 0x0d00, 0x1100, 0x1900, 0x2400,
|
||||
0x3200,
|
||||
0x4600, 0x6400, 0x6401, 0x6402, 0x6403, 0x6404, 0x6405, 0x6406,
|
||||
0x6407
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
|
||||
0x0200, 0x0300, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1201,
|
||||
0x1202,
|
||||
0x1203, 0x1204, 0x1205, 0x1206, 0x1207, 0x1907, 0x2307, 0x3207,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
|
||||
0x0100, 0x0200, 0x0400, 0x0700, 0x0900, 0x0c00, 0x1200, 0x1900,
|
||||
0x2300,
|
||||
0x3200, 0x4700, 0x4701, 0x4702, 0x4703, 0x4704, 0x4705, 0x4706,
|
||||
0x4707
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
|
||||
0x8123, 0x8264, 0x8086, 0x8245, 0x8056,
|
||||
0x9123, 0x9264, 0x9086, 0x9245, 0x9056
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal[] = {
|
||||
0x8101, 0x8253, 0x8053, 0x8234, 0x8034,
|
||||
0x9101, 0x9253, 0x9053, 0x9234, 0x9034
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[] = {
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
|
||||
0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234,
|
||||
0x9434, 0x9334, 0x9084, 0x9267, 0x9056, 0x9234
|
||||
};
|
||||
|
||||
u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
static const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
|
||||
0x8423, 0x8323, 0x8073, 0x8256, 0x8045, 0x8223,
|
||||
0x9423, 0x9323, 0x9073, 0x9256, 0x9045, 0x9223
|
||||
};
|
||||
|
||||
@ -309,6 +309,7 @@ const struct iwl_cfg iwl3168_2ac_cfg = {
|
||||
.nvm_calib_ver = IWL3168_TX_POWER_VERSION,
|
||||
.pwr_tx_backoffs = iwl7265_pwr_tx_backoffs,
|
||||
.dccm_len = IWL7265_DCCM_LEN,
|
||||
.nvm_type = IWL_NVM_SDP,
|
||||
};
|
||||
|
||||
const struct iwl_cfg iwl7265_2ac_cfg = {
|
||||
|
||||
@ -164,7 +164,7 @@ static const struct iwl_tt_params iwl8000_tt_params = {
|
||||
.default_nvm_file_C_step = DEFAULT_NVM_FILE_FAMILY_8000C, \
|
||||
.thermal_params = &iwl8000_tt_params, \
|
||||
.apmg_not_supported = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true
|
||||
|
||||
#define IWL_DEVICE_8000 \
|
||||
|
||||
@ -148,7 +148,7 @@ static const struct iwl_tt_params iwl9000_tt_params = {
|
||||
.vht_mu_mimo_supported = true, \
|
||||
.mac_addr_from_csr = true, \
|
||||
.rf_id = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true
|
||||
|
||||
const struct iwl_cfg iwl9160_2ac_cfg = {
|
||||
|
||||
@ -133,7 +133,7 @@ static const struct iwl_ht_params iwl_a000_ht_params = {
|
||||
.use_tfh = true, \
|
||||
.rf_id = true, \
|
||||
.gen2 = true, \
|
||||
.ext_nvm = true, \
|
||||
.nvm_type = IWL_NVM_EXT, \
|
||||
.dbgc_supported = true
|
||||
|
||||
const struct iwl_cfg iwla000_2ac_cfg_hr = {
|
||||
|
||||
@ -108,6 +108,7 @@ enum iwl_nvm_access_target {
|
||||
* @NVM_SECTION_TYPE_REGULATORY: regulatory section
|
||||
* @NVM_SECTION_TYPE_CALIBRATION: calibration section
|
||||
* @NVM_SECTION_TYPE_PRODUCTION: production section
|
||||
* @NVM_SECTION_TYPE_REGULATORY_SDP: regulatory section used by 3168 series
|
||||
* @NVM_SECTION_TYPE_MAC_OVERRIDE: MAC override section
|
||||
* @NVM_SECTION_TYPE_PHY_SKU: PHY SKU section
|
||||
* @NVM_MAX_NUM_SECTIONS: number of sections
|
||||
@ -117,6 +118,7 @@ enum iwl_nvm_section_type {
|
||||
NVM_SECTION_TYPE_REGULATORY = 3,
|
||||
NVM_SECTION_TYPE_CALIBRATION = 4,
|
||||
NVM_SECTION_TYPE_PRODUCTION = 5,
|
||||
NVM_SECTION_TYPE_REGULATORY_SDP = 8,
|
||||
NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
|
||||
NVM_SECTION_TYPE_PHY_SKU = 12,
|
||||
NVM_MAX_NUM_SECTIONS = 13,
|
||||
|
||||
@ -1086,7 +1086,7 @@ void iwl_fw_error_dump_wk(struct work_struct *work)
|
||||
|
||||
if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
|
||||
/* stop recording */
|
||||
iwl_set_bits_prph(fwrt->trans, MON_BUFF_SAMPLE_CTL, 0x100);
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
|
||||
iwl_fw_error_dump(fwrt);
|
||||
|
||||
@ -1104,10 +1104,7 @@ void iwl_fw_error_dump_wk(struct work_struct *work)
|
||||
u32 in_sample = iwl_read_prph(fwrt->trans, DBGC_IN_SAMPLE);
|
||||
u32 out_ctrl = iwl_read_prph(fwrt->trans, DBGC_OUT_CTRL);
|
||||
|
||||
/* stop recording */
|
||||
iwl_write_prph(fwrt->trans, DBGC_IN_SAMPLE, 0);
|
||||
udelay(100);
|
||||
iwl_write_prph(fwrt->trans, DBGC_OUT_CTRL, 0);
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
/* wait before we collect the data till the DBGC stop */
|
||||
udelay(500);
|
||||
|
||||
|
||||
@ -68,6 +68,8 @@
|
||||
#include <linux/workqueue.h>
|
||||
#include <net/cfg80211.h>
|
||||
#include "runtime.h"
|
||||
#include "iwl-prph.h"
|
||||
#include "iwl-io.h"
|
||||
#include "file.h"
|
||||
#include "error-dump.h"
|
||||
|
||||
@ -194,8 +196,21 @@ _iwl_fw_dbg_trigger_simple_stop(struct iwl_fw_runtime *fwrt,
|
||||
iwl_fw_dbg_get_trigger((fwrt)->fw,\
|
||||
(trig)))
|
||||
|
||||
static inline void iwl_fw_dbg_stop_recording(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_7000) {
|
||||
iwl_set_bits_prph(fwrt->trans, MON_BUFF_SAMPLE_CTL, 0x100);
|
||||
} else {
|
||||
iwl_write_prph(fwrt->trans, DBGC_IN_SAMPLE, 0);
|
||||
udelay(100);
|
||||
iwl_write_prph(fwrt->trans, DBGC_OUT_CTRL, 0);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void iwl_fw_dump_conf_clear(struct iwl_fw_runtime *fwrt)
|
||||
{
|
||||
iwl_fw_dbg_stop_recording(fwrt);
|
||||
|
||||
fwrt->dump.conf = FW_DBG_INVALID;
|
||||
}
|
||||
|
||||
|
||||
@ -108,6 +108,18 @@ enum iwl_led_mode {
|
||||
IWL_LED_DISABLE,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum iwl_nvm_type - nvm formats
|
||||
* @IWL_NVM: the regular format
|
||||
* @IWL_NVM_EXT: extended NVM format
|
||||
* @IWL_NVM_SDP: NVM format used by 3168 series
|
||||
*/
|
||||
enum iwl_nvm_type {
|
||||
IWL_NVM,
|
||||
IWL_NVM_EXT,
|
||||
IWL_NVM_SDP,
|
||||
};
|
||||
|
||||
/*
|
||||
* This is the threshold value of plcp error rate per 100mSecs. It is
|
||||
* used to set and check for the validity of plcp_delta.
|
||||
@ -320,7 +332,7 @@ struct iwl_pwr_tx_backoff {
|
||||
* @integrated: discrete or integrated
|
||||
* @gen2: a000 and on transport operation
|
||||
* @cdb: CDB support
|
||||
* @ext_nvm: extended NVM format
|
||||
* @nvm_type: see &enum iwl_nvm_type
|
||||
*
|
||||
* We enable the driver to be backward compatible wrt. hardware features.
|
||||
* API differences in uCode shouldn't be handled here but through TLVs
|
||||
@ -342,6 +354,7 @@ struct iwl_cfg {
|
||||
const struct iwl_tt_params *thermal_params;
|
||||
enum iwl_device_family device_family;
|
||||
enum iwl_led_mode led_mode;
|
||||
enum iwl_nvm_type nvm_type;
|
||||
u32 max_data_size;
|
||||
u32 max_inst_size;
|
||||
netdev_features_t features;
|
||||
@ -369,7 +382,6 @@ struct iwl_cfg {
|
||||
use_tfh:1,
|
||||
gen2:1,
|
||||
cdb:1,
|
||||
ext_nvm:1,
|
||||
dbgc_supported:1;
|
||||
u8 valid_tx_ant;
|
||||
u8 valid_rx_ant;
|
||||
|
||||
@ -77,7 +77,7 @@
|
||||
#include "iwl-csr.h"
|
||||
|
||||
/* NVM offsets (in words) definitions */
|
||||
enum wkp_nvm_offsets {
|
||||
enum nvm_offsets {
|
||||
/* NVM HW-Section offset (in words) definitions */
|
||||
SUBSYSTEM_ID = 0x0A,
|
||||
HW_ADDR = 0x15,
|
||||
@ -92,7 +92,10 @@ enum wkp_nvm_offsets {
|
||||
|
||||
/* NVM calibration section offset (in words) definitions */
|
||||
NVM_CALIB_SECTION = 0x2B8,
|
||||
XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
|
||||
XTAL_CALIB = 0x316 - NVM_CALIB_SECTION,
|
||||
|
||||
/* NVM REGULATORY -Section offset (in words) definitions */
|
||||
NVM_CHANNELS_SDP = 0,
|
||||
};
|
||||
|
||||
enum ext_nvm_offsets {
|
||||
@ -206,8 +209,36 @@ enum iwl_nvm_channel_flags {
|
||||
NVM_CHANNEL_DC_HIGH = BIT(12),
|
||||
};
|
||||
|
||||
static inline void iwl_nvm_print_channel_flags(struct device *dev, u32 level,
|
||||
int chan, u16 flags)
|
||||
{
|
||||
#define CHECK_AND_PRINT_I(x) \
|
||||
((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
|
||||
((flags & NVM_CHANNEL_##x) ? " " #x : "")
|
||||
|
||||
if (!(flags & NVM_CHANNEL_VALID)) {
|
||||
IWL_DEBUG_DEV(dev, level, "Ch. %d: 0x%x: No traffic\n",
|
||||
chan, flags);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Note: already can print up to 101 characters, 110 is the limit! */
|
||||
IWL_DEBUG_DEV(dev, level,
|
||||
"Ch. %d: 0x%x:%s%s%s%s%s%s%s%s%s%s%s%s\n",
|
||||
chan, flags,
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH));
|
||||
#undef CHECK_AND_PRINT_I
|
||||
}
|
||||
|
||||
static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
|
||||
u16 nvm_flags, const struct iwl_cfg *cfg)
|
||||
@ -215,7 +246,7 @@ static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
|
||||
u32 flags = IEEE80211_CHAN_NO_HT40;
|
||||
u32 last_5ghz_ht = LAST_5GHZ_HT;
|
||||
|
||||
if (cfg->ext_nvm)
|
||||
if (cfg->nvm_type == IWL_NVM_EXT)
|
||||
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
|
||||
|
||||
if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
|
||||
@ -268,7 +299,7 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int num_of_ch, num_2ghz_channels;
|
||||
const u8 *nvm_chan;
|
||||
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
num_of_ch = IWL_NUM_CHANNELS;
|
||||
nvm_chan = &iwl_nvm_channels[0];
|
||||
num_2ghz_channels = NUM_2GHZ_CHANNELS;
|
||||
@ -302,12 +333,8 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
* supported, hence we still want to add them to
|
||||
* the list of supported channels to cfg80211.
|
||||
*/
|
||||
IWL_DEBUG_EEPROM(dev,
|
||||
"Ch. %d Flags %x [%sGHz] - No traffic\n",
|
||||
nvm_chan[ch_idx],
|
||||
ch_flags,
|
||||
(ch_idx >= num_2ghz_channels) ?
|
||||
"5.2" : "2.4");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -337,27 +364,10 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
|
||||
else
|
||||
channel->flags = 0;
|
||||
|
||||
IWL_DEBUG_EEPROM(dev,
|
||||
"Ch. %d [%sGHz] flags 0x%x %s%s%s%s%s%s%s%s%s%s%s%s(%ddBm): Ad-Hoc %ssupported\n",
|
||||
channel->hw_value,
|
||||
is_5ghz ? "5.2" : "2.4",
|
||||
ch_flags,
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH),
|
||||
channel->max_power,
|
||||
((ch_flags & NVM_CHANNEL_IBSS) &&
|
||||
!(ch_flags & NVM_CHANNEL_RADAR))
|
||||
? "" : "not ");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_EEPROM,
|
||||
channel->hw_value, ch_flags);
|
||||
IWL_DEBUG_EEPROM(dev, "Ch. %d: %ddBm\n",
|
||||
channel->hw_value, channel->max_power);
|
||||
}
|
||||
|
||||
return n_channels;
|
||||
@ -484,7 +494,7 @@ IWL_EXPORT_SYMBOL(iwl_init_sbands);
|
||||
static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
const __le16 *phy_sku)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + SKU);
|
||||
|
||||
return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
|
||||
@ -492,7 +502,7 @@ static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
|
||||
static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + NVM_VERSION);
|
||||
else
|
||||
return le32_to_cpup((__le32 *)(nvm_sw +
|
||||
@ -502,7 +512,7 @@ static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
|
||||
const __le16 *phy_sku)
|
||||
{
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + RADIO_CFG);
|
||||
|
||||
return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM));
|
||||
@ -513,7 +523,7 @@ static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
|
||||
{
|
||||
int n_hw_addr;
|
||||
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
return le16_to_cpup(nvm_sw + N_HW_ADDRS);
|
||||
|
||||
n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
|
||||
@ -525,7 +535,7 @@ static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
|
||||
struct iwl_nvm_data *data,
|
||||
u32 radio_cfg)
|
||||
{
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
|
||||
data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
|
||||
data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
|
||||
@ -634,7 +644,7 @@ static int iwl_set_hw_address(struct iwl_trans *trans,
|
||||
{
|
||||
if (cfg->mac_addr_from_csr) {
|
||||
iwl_set_hw_address_from_csr(trans, data);
|
||||
} else if (!cfg->ext_nvm) {
|
||||
} else if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
|
||||
|
||||
/* The byte order is little endian 16 bit, meaning 214365 */
|
||||
@ -706,7 +716,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
u16 lar_config;
|
||||
const __le16 *ch_section;
|
||||
|
||||
if (!cfg->ext_nvm)
|
||||
if (cfg->nvm_type != IWL_NVM_EXT)
|
||||
data = kzalloc(sizeof(*data) +
|
||||
sizeof(struct ieee80211_channel) *
|
||||
IWL_NUM_CHANNELS,
|
||||
@ -740,7 +750,7 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
|
||||
data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
|
||||
|
||||
if (!cfg->ext_nvm) {
|
||||
if (cfg->nvm_type != IWL_NVM_EXT) {
|
||||
/* Checking for required sections */
|
||||
if (!nvm_calib) {
|
||||
IWL_ERR(trans,
|
||||
@ -748,11 +758,15 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
|
||||
kfree(data);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ch_section = cfg->nvm_type == IWL_NVM_SDP ?
|
||||
®ulatory[NVM_CHANNELS_SDP] :
|
||||
&nvm_sw[NVM_CHANNELS];
|
||||
|
||||
/* in family 8000 Xtal calibration values moved to OTP */
|
||||
data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
|
||||
data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
|
||||
lar_enabled = true;
|
||||
ch_section = &nvm_sw[NVM_CHANNELS];
|
||||
} else {
|
||||
u16 lar_offset = data->nvm_version < 0xE39 ?
|
||||
NVM_LAR_OFFSET_OLD :
|
||||
@ -786,7 +800,7 @@ static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
|
||||
u32 flags = NL80211_RRF_NO_HT40;
|
||||
u32 last_5ghz_ht = LAST_5GHZ_HT;
|
||||
|
||||
if (cfg->ext_nvm)
|
||||
if (cfg->nvm_type == IWL_NVM_EXT)
|
||||
last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
|
||||
|
||||
if (ch_idx < NUM_2GHZ_CHANNELS &&
|
||||
@ -834,7 +848,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int ch_idx;
|
||||
u16 ch_flags;
|
||||
u32 reg_rule_flags, prev_reg_rule_flags = 0;
|
||||
const u8 *nvm_chan = cfg->ext_nvm ?
|
||||
const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
|
||||
iwl_ext_nvm_channels : iwl_nvm_channels;
|
||||
struct ieee80211_regdomain *regd;
|
||||
int size_of_regd;
|
||||
@ -843,7 +857,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
int center_freq, prev_center_freq = 0;
|
||||
int valid_rules = 0;
|
||||
bool new_rule;
|
||||
int max_num_ch = cfg->ext_nvm ?
|
||||
int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
|
||||
IWL_NUM_CHANNELS_EXT : IWL_NUM_CHANNELS;
|
||||
|
||||
if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
|
||||
@ -873,12 +887,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
new_rule = false;
|
||||
|
||||
if (!(ch_flags & NVM_CHANNEL_VALID)) {
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d Flags %x [%sGHz] - No traffic\n",
|
||||
nvm_chan[ch_idx],
|
||||
ch_flags,
|
||||
(ch_idx >= NUM_2GHZ_CHANNELS) ?
|
||||
"5.2" : "2.4");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
continue;
|
||||
}
|
||||
|
||||
@ -914,31 +924,8 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
|
||||
prev_center_freq = center_freq;
|
||||
prev_reg_rule_flags = reg_rule_flags;
|
||||
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s%s%s%s(0x%02x)\n",
|
||||
center_freq,
|
||||
band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
|
||||
CHECK_AND_PRINT_I(VALID),
|
||||
CHECK_AND_PRINT_I(IBSS),
|
||||
CHECK_AND_PRINT_I(ACTIVE),
|
||||
CHECK_AND_PRINT_I(RADAR),
|
||||
CHECK_AND_PRINT_I(INDOOR_ONLY),
|
||||
CHECK_AND_PRINT_I(GO_CONCURRENT),
|
||||
CHECK_AND_PRINT_I(UNIFORM),
|
||||
CHECK_AND_PRINT_I(20MHZ),
|
||||
CHECK_AND_PRINT_I(40MHZ),
|
||||
CHECK_AND_PRINT_I(80MHZ),
|
||||
CHECK_AND_PRINT_I(160MHZ),
|
||||
CHECK_AND_PRINT_I(DC_HIGH),
|
||||
ch_flags);
|
||||
IWL_DEBUG_DEV(dev, IWL_DL_LAR,
|
||||
"Ch. %d [%sGHz] reg_flags 0x%x: %s\n",
|
||||
center_freq,
|
||||
band == NL80211_BAND_5GHZ ? "5.2" : "2.4",
|
||||
reg_rule_flags,
|
||||
((ch_flags & NVM_CHANNEL_ACTIVE) &&
|
||||
!(ch_flags & NVM_CHANNEL_RADAR))
|
||||
? "Ad-Hoc" : "");
|
||||
iwl_nvm_print_channel_flags(dev, IWL_DL_LAR,
|
||||
nvm_chan[ch_idx], ch_flags);
|
||||
}
|
||||
|
||||
regd->n_reg_rules = valid_rules;
|
||||
|
||||
@ -1077,6 +1077,7 @@ static void iwl_mvm_restart_cleanup(struct iwl_mvm *mvm)
|
||||
mvm->vif_count = 0;
|
||||
mvm->rx_ba_sessions = 0;
|
||||
mvm->fwrt.dump.conf = FW_DBG_INVALID;
|
||||
mvm->monitor_on = false;
|
||||
|
||||
/* keep statistics ticking */
|
||||
iwl_mvm_accu_radio_stats(mvm);
|
||||
@ -1437,6 +1438,9 @@ static int iwl_mvm_mac_add_interface(struct ieee80211_hw *hw,
|
||||
mvm->p2p_device_vif = vif;
|
||||
}
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_MONITOR)
|
||||
mvm->monitor_on = true;
|
||||
|
||||
iwl_mvm_vif_dbgfs_register(mvm, vif);
|
||||
goto out_unlock;
|
||||
|
||||
@ -1526,6 +1530,9 @@ static void iwl_mvm_mac_remove_interface(struct ieee80211_hw *hw,
|
||||
iwl_mvm_power_update_mac(mvm);
|
||||
iwl_mvm_mac_ctxt_remove(mvm, vif);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_MONITOR)
|
||||
mvm->monitor_on = false;
|
||||
|
||||
out_release:
|
||||
mutex_unlock(&mvm->mutex);
|
||||
}
|
||||
|
||||
@ -1015,6 +1015,9 @@ struct iwl_mvm {
|
||||
bool drop_bcn_ap_mode;
|
||||
|
||||
struct delayed_work cs_tx_unblock_dwork;
|
||||
|
||||
/* does a monitor vif exist (only one can exist hence bool) */
|
||||
bool monitor_on;
|
||||
#ifdef CONFIG_ACPI
|
||||
struct iwl_mvm_sar_profile sar_profiles[IWL_MVM_SAR_PROFILE_NUM];
|
||||
struct iwl_mvm_geo_profile geo_profiles[IWL_NUM_GEO_PROFILES];
|
||||
@ -1159,7 +1162,7 @@ static inline bool iwl_mvm_is_lar_supported(struct iwl_mvm *mvm)
|
||||
* Enable LAR only if it is supported by the FW (TLV) &&
|
||||
* enabled in the NVM
|
||||
*/
|
||||
if (mvm->cfg->ext_nvm)
|
||||
if (mvm->cfg->nvm_type == IWL_NVM_EXT)
|
||||
return nvm_lar && tlv_lar;
|
||||
else
|
||||
return tlv_lar;
|
||||
|
||||
@ -295,18 +295,24 @@ iwl_parse_nvm_sections(struct iwl_mvm *mvm)
|
||||
const __be16 *hw;
|
||||
const __le16 *sw, *calib, *regulatory, *mac_override, *phy_sku;
|
||||
bool lar_enabled;
|
||||
int regulatory_type;
|
||||
|
||||
/* Checking for required sections */
|
||||
if (!mvm->trans->cfg->ext_nvm) {
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
|
||||
if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
|
||||
!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
|
||||
IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
|
||||
return NULL;
|
||||
}
|
||||
} else {
|
||||
if (mvm->trans->cfg->nvm_type == IWL_NVM_SDP)
|
||||
regulatory_type = NVM_SECTION_TYPE_REGULATORY_SDP;
|
||||
else
|
||||
regulatory_type = NVM_SECTION_TYPE_REGULATORY;
|
||||
|
||||
/* SW and REGULATORY sections are mandatory */
|
||||
if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
|
||||
!mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
|
||||
!mvm->nvm_sections[regulatory_type].data) {
|
||||
IWL_ERR(mvm,
|
||||
"Can't parse empty family 8000 OTP/NVM sections\n");
|
||||
return NULL;
|
||||
@ -330,11 +336,14 @@ iwl_parse_nvm_sections(struct iwl_mvm *mvm)
|
||||
hw = (const __be16 *)sections[mvm->cfg->nvm_hw_section_num].data;
|
||||
sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
|
||||
calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
|
||||
regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
|
||||
mac_override =
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
|
||||
phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
|
||||
|
||||
regulatory = mvm->trans->cfg->nvm_type == IWL_NVM_SDP ?
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY_SDP].data :
|
||||
(const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
|
||||
|
||||
lar_enabled = !iwlwifi_mod_params.lar_disable &&
|
||||
fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
|
||||
@ -394,7 +403,7 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
|
||||
IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
|
||||
|
||||
/* Maximal size depends on NVM version */
|
||||
if (!mvm->trans->cfg->ext_nvm)
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT)
|
||||
max_section_size = IWL_MAX_NVM_SECTION_SIZE;
|
||||
else
|
||||
max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
|
||||
@ -465,7 +474,7 @@ int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
|
||||
break;
|
||||
}
|
||||
|
||||
if (!mvm->trans->cfg->ext_nvm) {
|
||||
if (mvm->trans->cfg->nvm_type != IWL_NVM_EXT) {
|
||||
section_size =
|
||||
2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
|
||||
section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
|
||||
@ -740,7 +749,7 @@ int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
|
||||
struct ieee80211_regdomain *regd;
|
||||
char mcc[3];
|
||||
|
||||
if (mvm->cfg->ext_nvm) {
|
||||
if (mvm->cfg->nvm_type == IWL_NVM_EXT) {
|
||||
tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
|
||||
nvm_lar = mvm->nvm_data->lar_enabled;
|
||||
|
||||
@ -244,7 +244,9 @@ static u32 iwl_mvm_set_mac80211_rx_flag(struct iwl_mvm *mvm,
|
||||
return 0;
|
||||
|
||||
default:
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", rx_pkt_status);
|
||||
/* Expected in monitor (not having the keys) */
|
||||
if (!mvm->monitor_on)
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", rx_pkt_status);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -277,7 +277,9 @@ static int iwl_mvm_rx_crypto(struct iwl_mvm *mvm, struct ieee80211_hdr *hdr,
|
||||
stats->flag |= RX_FLAG_DECRYPTED;
|
||||
return 0;
|
||||
default:
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", status);
|
||||
/* Expected in monitor (not having the keys) */
|
||||
if (!mvm->monitor_on)
|
||||
IWL_ERR(mvm, "Unhandled alg: 0x%x\n", status);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@ -631,7 +631,7 @@ static int iwl_mvm_tzone_get_temp(struct thermal_zone_device *device,
|
||||
|
||||
if (!iwl_mvm_firmware_running(mvm) ||
|
||||
mvm->fwrt.cur_fw_img != IWL_UCODE_REGULAR) {
|
||||
ret = -EIO;
|
||||
ret = -ENODATA;
|
||||
goto out;
|
||||
}
|
||||
|
||||
|
||||
@ -1122,7 +1122,7 @@ static u8 _rtl8821ae_dbi_read(struct rtl_priv *rtlpriv, u16 addr)
|
||||
}
|
||||
if (0 == tmp) {
|
||||
read_addr = REG_DBI_RDATA + addr % 4;
|
||||
ret = rtl_read_byte(rtlpriv, read_addr);
|
||||
ret = rtl_read_word(rtlpriv, read_addr);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user