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synced 2024-12-14 06:16:47 +07:00
drm/i915/guc: Make the GuC fw loading helper functions general
Rename some of the GuC fw loading code to make them more general. We will utilise them for HuC loading as well. s/intel_guc_fw/intel_uc_fw/g s/GUC_FIRMWARE/INTEL_UC_FIRMWARE/g Struct intel_guc_fw is renamed to intel_uc_fw. Prefix of tts members, such as 'guc' or 'guc_fw' either is renamed to 'uc' or removed for same purpose. v2: rebased on top of nightly. reapplied the search/replace as upstream code as changed. v3: removed G from messages in shared fw fetch function. v4: rebased.Updated dev to dev_priv in intel_guc_setup(), guc_fw_getch() and intel_guc_init(). v5: rebased. Remove uint32_t fw_type to patch 2. Add INTEL_ prefix for fields in enum intel_uc_fw_status. Remove uc_dev field since its never used.Rename uc_fw to just fw and guc_fw to fw to avoid redundency. v6: rebased. Remove sections of code that were commented and no longer required. v7: rebased. Remove uc_fw_ prefix from path and obj fields in intel_uc_fw struct as suggested by Michal. v8: rebased. Add declaration of intel_guc_wopcm_size() in this patch instead of patch 3. Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Alex Dai <yu.dai@intel.com> Signed-off-by: Peter Antoine <peter.antoine@intel.com> Reviewed-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1484356631-16139-2-git-send-email-anusha.srivatsa@intel.com
This commit is contained in:
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@ -2355,7 +2355,7 @@ static int i915_llc(struct seq_file *m, void *data)
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static int i915_guc_load_status_info(struct seq_file *m, void *data)
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{
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struct drm_i915_private *dev_priv = node_to_i915(m->private);
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struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
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struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
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u32 tmp, i;
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if (!HAS_GUC_UCODE(dev_priv))
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@ -2363,15 +2363,15 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data)
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seq_printf(m, "GuC firmware status:\n");
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seq_printf(m, "\tpath: %s\n",
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guc_fw->guc_fw_path);
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guc_fw->path);
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seq_printf(m, "\tfetch: %s\n",
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intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
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intel_uc_fw_status_repr(guc_fw->fetch_status));
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seq_printf(m, "\tload: %s\n",
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intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
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intel_uc_fw_status_repr(guc_fw->load_status));
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seq_printf(m, "\tversion wanted: %d.%d\n",
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guc_fw->guc_fw_major_wanted, guc_fw->guc_fw_minor_wanted);
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guc_fw->major_ver_wanted, guc_fw->minor_ver_wanted);
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seq_printf(m, "\tversion found: %d.%d\n",
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guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found);
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guc_fw->major_ver_found, guc_fw->minor_ver_found);
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seq_printf(m, "\theader: offset is %d; size = %d\n",
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guc_fw->header_offset, guc_fw->header_size);
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seq_printf(m, "\tuCode: offset is %d; size = %d\n",
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@ -998,7 +998,7 @@ int intel_guc_suspend(struct drm_i915_private *dev_priv)
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struct i915_gem_context *ctx;
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u32 data[3];
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if (guc->guc_fw.guc_fw_load_status != GUC_FIRMWARE_SUCCESS)
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if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
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return 0;
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gen9_disable_guc_interrupts(dev_priv);
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@ -1025,7 +1025,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv)
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struct i915_gem_context *ctx;
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u32 data[3];
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if (guc->guc_fw.guc_fw_load_status != GUC_FIRMWARE_SUCCESS)
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if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
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return 0;
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if (i915.guc_log_level >= 0)
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@ -75,16 +75,16 @@ MODULE_FIRMWARE(I915_BXT_GUC_UCODE);
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MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
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/* User-friendly representation of an enum */
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const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status)
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const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status)
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{
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switch (status) {
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case GUC_FIRMWARE_FAIL:
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case INTEL_UC_FIRMWARE_FAIL:
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return "FAIL";
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case GUC_FIRMWARE_NONE:
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case INTEL_UC_FIRMWARE_NONE:
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return "NONE";
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case GUC_FIRMWARE_PENDING:
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case INTEL_UC_FIRMWARE_PENDING:
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return "PENDING";
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case GUC_FIRMWARE_SUCCESS:
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case INTEL_UC_FIRMWARE_SUCCESS:
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return "SUCCESS";
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default:
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return "UNKNOWN!";
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@ -272,7 +272,7 @@ static inline bool guc_ucode_response(struct drm_i915_private *dev_priv,
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static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv,
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struct i915_vma *vma)
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{
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struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
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struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
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unsigned long offset;
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struct sg_table *sg = vma->pages;
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u32 status, rsa[UOS_RSA_SCRATCH_MAX_COUNT];
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@ -344,17 +344,17 @@ static u32 guc_wopcm_size(struct drm_i915_private *dev_priv)
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*/
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static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
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{
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struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
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struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
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struct i915_vma *vma;
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int ret;
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ret = i915_gem_object_set_to_gtt_domain(guc_fw->guc_fw_obj, false);
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ret = i915_gem_object_set_to_gtt_domain(guc_fw->obj, false);
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if (ret) {
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DRM_DEBUG_DRIVER("set-domain failed %d\n", ret);
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return ret;
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}
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vma = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0,
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vma = i915_gem_object_ggtt_pin(guc_fw->obj, NULL, 0, 0,
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PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
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if (IS_ERR(vma)) {
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DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma));
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@ -442,14 +442,14 @@ static int guc_hw_reset(struct drm_i915_private *dev_priv)
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*/
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int intel_guc_setup(struct drm_i915_private *dev_priv)
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{
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struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
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const char *fw_path = guc_fw->guc_fw_path;
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struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
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const char *fw_path = guc_fw->path;
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int retries, ret, err;
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DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
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fw_path,
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intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
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intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
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intel_uc_fw_status_repr(guc_fw->fetch_status),
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intel_uc_fw_status_repr(guc_fw->load_status));
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/* Loading forbidden, or no firmware to load? */
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if (!i915.enable_guc_loading) {
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@ -467,10 +467,10 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
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}
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/* Fetch failed, or already fetched but failed to load? */
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if (guc_fw->guc_fw_fetch_status != GUC_FIRMWARE_SUCCESS) {
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if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
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err = -EIO;
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goto fail;
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} else if (guc_fw->guc_fw_load_status == GUC_FIRMWARE_FAIL) {
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} else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) {
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err = -ENOEXEC;
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goto fail;
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}
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@ -481,11 +481,11 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
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/* We need to notify the guc whenever we change the GGTT */
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i915_ggtt_enable_guc(dev_priv);
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guc_fw->guc_fw_load_status = GUC_FIRMWARE_PENDING;
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guc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
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DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
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intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
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intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
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intel_uc_fw_status_repr(guc_fw->fetch_status),
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intel_uc_fw_status_repr(guc_fw->load_status));
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err = i915_guc_submission_init(dev_priv);
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if (err)
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@ -517,11 +517,11 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
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"retry %d more time(s)\n", err, retries);
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}
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guc_fw->guc_fw_load_status = GUC_FIRMWARE_SUCCESS;
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guc_fw->load_status = INTEL_UC_FIRMWARE_SUCCESS;
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DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
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intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
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intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
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intel_uc_fw_status_repr(guc_fw->fetch_status),
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intel_uc_fw_status_repr(guc_fw->load_status));
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if (i915.enable_guc_submission) {
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if (i915.guc_log_level >= 0)
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@ -536,8 +536,8 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
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return 0;
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fail:
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if (guc_fw->guc_fw_load_status == GUC_FIRMWARE_PENDING)
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guc_fw->guc_fw_load_status = GUC_FIRMWARE_FAIL;
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if (guc_fw->load_status == INTEL_UC_FIRMWARE_PENDING)
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guc_fw->load_status = INTEL_UC_FIRMWARE_FAIL;
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guc_interrupts_release(dev_priv);
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i915_guc_submission_disable(dev_priv);
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@ -583,8 +583,8 @@ int intel_guc_setup(struct drm_i915_private *dev_priv)
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return ret;
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}
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static void guc_fw_fetch(struct drm_i915_private *dev_priv,
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struct intel_guc_fw *guc_fw)
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void intel_uc_fw_fetch(struct drm_i915_private *dev_priv,
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struct intel_uc_fw *uc_fw)
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{
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struct pci_dev *pdev = dev_priv->drm.pdev;
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struct drm_i915_gem_object *obj;
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@ -593,17 +593,17 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
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size_t size;
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int err;
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DRM_DEBUG_DRIVER("before requesting firmware: GuC fw fetch status %s\n",
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intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
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DRM_DEBUG_DRIVER("before requesting firmware: uC fw fetch status %s\n",
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intel_uc_fw_status_repr(uc_fw->fetch_status));
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err = request_firmware(&fw, guc_fw->guc_fw_path, &pdev->dev);
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err = request_firmware(&fw, uc_fw->path, &pdev->dev);
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if (err)
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goto fail;
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if (!fw)
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goto fail;
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DRM_DEBUG_DRIVER("fetch GuC fw from %s succeeded, fw %p\n",
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guc_fw->guc_fw_path, fw);
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DRM_DEBUG_DRIVER("fetch uC fw from %s succeeded, fw %p\n",
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uc_fw->path, fw);
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/* Check the size of the blob before examining buffer contents */
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if (fw->size < sizeof(struct guc_css_header)) {
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@ -614,36 +614,36 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
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css = (struct guc_css_header *)fw->data;
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/* Firmware bits always start from header */
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guc_fw->header_offset = 0;
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guc_fw->header_size = (css->header_size_dw - css->modulus_size_dw -
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uc_fw->header_offset = 0;
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uc_fw->header_size = (css->header_size_dw - css->modulus_size_dw -
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css->key_size_dw - css->exponent_size_dw) * sizeof(u32);
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if (guc_fw->header_size != sizeof(struct guc_css_header)) {
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if (uc_fw->header_size != sizeof(struct guc_css_header)) {
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DRM_NOTE("CSS header definition mismatch\n");
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goto fail;
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}
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/* then, uCode */
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guc_fw->ucode_offset = guc_fw->header_offset + guc_fw->header_size;
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guc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
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uc_fw->ucode_offset = uc_fw->header_offset + uc_fw->header_size;
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uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
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/* now RSA */
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if (css->key_size_dw != UOS_RSA_SCRATCH_MAX_COUNT) {
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DRM_NOTE("RSA key size is bad\n");
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goto fail;
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}
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guc_fw->rsa_offset = guc_fw->ucode_offset + guc_fw->ucode_size;
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guc_fw->rsa_size = css->key_size_dw * sizeof(u32);
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uc_fw->rsa_offset = uc_fw->ucode_offset + uc_fw->ucode_size;
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uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
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/* At least, it should have header, uCode and RSA. Size of all three. */
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size = guc_fw->header_size + guc_fw->ucode_size + guc_fw->rsa_size;
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size = uc_fw->header_size + uc_fw->ucode_size + uc_fw->rsa_size;
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if (fw->size < size) {
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DRM_NOTE("Missing firmware components\n");
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goto fail;
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}
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/* Header and uCode will be loaded to WOPCM. Size of the two. */
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size = guc_fw->header_size + guc_fw->ucode_size;
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size = uc_fw->header_size + uc_fw->ucode_size;
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if (size > guc_wopcm_size(dev_priv)) {
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DRM_NOTE("Firmware is too large to fit in WOPCM\n");
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goto fail;
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@ -655,21 +655,21 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
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* TWO bytes each (i.e. u16), although all pointers and offsets are defined
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* in terms of bytes (u8).
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*/
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guc_fw->guc_fw_major_found = css->guc_sw_version >> 16;
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guc_fw->guc_fw_minor_found = css->guc_sw_version & 0xFFFF;
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uc_fw->major_ver_found = css->guc_sw_version >> 16;
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uc_fw->minor_ver_found = css->guc_sw_version & 0xFFFF;
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if (guc_fw->guc_fw_major_found != guc_fw->guc_fw_major_wanted ||
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guc_fw->guc_fw_minor_found < guc_fw->guc_fw_minor_wanted) {
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DRM_NOTE("GuC firmware version %d.%d, required %d.%d\n",
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guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found,
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guc_fw->guc_fw_major_wanted, guc_fw->guc_fw_minor_wanted);
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if (uc_fw->major_ver_found != uc_fw->major_ver_wanted ||
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uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) {
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DRM_NOTE("uC firmware version %d.%d, required %d.%d\n",
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uc_fw->major_ver_found, uc_fw->minor_ver_found,
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uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
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err = -ENOEXEC;
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goto fail;
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}
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DRM_DEBUG_DRIVER("firmware version %d.%d OK (minimum %d.%d)\n",
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guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found,
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guc_fw->guc_fw_major_wanted, guc_fw->guc_fw_minor_wanted);
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uc_fw->major_ver_found, uc_fw->minor_ver_found,
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uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
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mutex_lock(&dev_priv->drm.struct_mutex);
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obj = i915_gem_object_create_from_data(dev_priv, fw->data, fw->size);
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@ -679,31 +679,31 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
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goto fail;
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}
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guc_fw->guc_fw_obj = obj;
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guc_fw->guc_fw_size = fw->size;
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uc_fw->obj = obj;
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uc_fw->size = fw->size;
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DRM_DEBUG_DRIVER("GuC fw fetch status SUCCESS, obj %p\n",
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guc_fw->guc_fw_obj);
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DRM_DEBUG_DRIVER("uC fw fetch status SUCCESS, obj %p\n",
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uc_fw->obj);
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release_firmware(fw);
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guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_SUCCESS;
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uc_fw->fetch_status = INTEL_UC_FIRMWARE_SUCCESS;
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return;
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fail:
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DRM_WARN("Failed to fetch valid GuC firmware from %s (error %d)\n",
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guc_fw->guc_fw_path, err);
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DRM_DEBUG_DRIVER("GuC fw fetch status FAIL; err %d, fw %p, obj %p\n",
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err, fw, guc_fw->guc_fw_obj);
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DRM_WARN("Failed to fetch valid uC firmware from %s (error %d)\n",
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uc_fw->path, err);
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DRM_DEBUG_DRIVER("uC fw fetch status FAIL; err %d, fw %p, obj %p\n",
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err, fw, uc_fw->obj);
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mutex_lock(&dev_priv->drm.struct_mutex);
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obj = guc_fw->guc_fw_obj;
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obj = uc_fw->obj;
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if (obj)
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i915_gem_object_put(obj);
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guc_fw->guc_fw_obj = NULL;
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uc_fw->obj = NULL;
|
||||
mutex_unlock(&dev_priv->drm.struct_mutex);
|
||||
|
||||
release_firmware(fw); /* OK even if fw is NULL */
|
||||
guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_FAIL;
|
||||
uc_fw->fetch_status = INTEL_UC_FIRMWARE_FAIL;
|
||||
}
|
||||
|
||||
/**
|
||||
@ -717,7 +717,7 @@ static void guc_fw_fetch(struct drm_i915_private *dev_priv,
|
||||
*/
|
||||
void intel_guc_init(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
|
||||
struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
|
||||
const char *fw_path;
|
||||
|
||||
if (!HAS_GUC(dev_priv)) {
|
||||
@ -735,23 +735,23 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
|
||||
fw_path = NULL;
|
||||
} else if (IS_SKYLAKE(dev_priv)) {
|
||||
fw_path = I915_SKL_GUC_UCODE;
|
||||
guc_fw->guc_fw_major_wanted = SKL_FW_MAJOR;
|
||||
guc_fw->guc_fw_minor_wanted = SKL_FW_MINOR;
|
||||
guc_fw->major_ver_wanted = SKL_FW_MAJOR;
|
||||
guc_fw->minor_ver_wanted = SKL_FW_MINOR;
|
||||
} else if (IS_BROXTON(dev_priv)) {
|
||||
fw_path = I915_BXT_GUC_UCODE;
|
||||
guc_fw->guc_fw_major_wanted = BXT_FW_MAJOR;
|
||||
guc_fw->guc_fw_minor_wanted = BXT_FW_MINOR;
|
||||
guc_fw->major_ver_wanted = BXT_FW_MAJOR;
|
||||
guc_fw->minor_ver_wanted = BXT_FW_MINOR;
|
||||
} else if (IS_KABYLAKE(dev_priv)) {
|
||||
fw_path = I915_KBL_GUC_UCODE;
|
||||
guc_fw->guc_fw_major_wanted = KBL_FW_MAJOR;
|
||||
guc_fw->guc_fw_minor_wanted = KBL_FW_MINOR;
|
||||
guc_fw->major_ver_wanted = KBL_FW_MAJOR;
|
||||
guc_fw->minor_ver_wanted = KBL_FW_MINOR;
|
||||
} else {
|
||||
fw_path = ""; /* unknown device */
|
||||
}
|
||||
|
||||
guc_fw->guc_fw_path = fw_path;
|
||||
guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
|
||||
guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
|
||||
guc_fw->path = fw_path;
|
||||
guc_fw->fetch_status = INTEL_UC_FIRMWARE_NONE;
|
||||
guc_fw->load_status = INTEL_UC_FIRMWARE_NONE;
|
||||
|
||||
/* Early (and silent) return if GuC loading is disabled */
|
||||
if (!i915.enable_guc_loading)
|
||||
@ -761,9 +761,9 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
|
||||
if (*fw_path == '\0')
|
||||
return;
|
||||
|
||||
guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING;
|
||||
guc_fw->fetch_status = INTEL_UC_FIRMWARE_PENDING;
|
||||
DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path);
|
||||
guc_fw_fetch(dev_priv, guc_fw);
|
||||
intel_uc_fw_fetch(dev_priv, guc_fw);
|
||||
/* status must now be FAIL or SUCCESS */
|
||||
}
|
||||
|
||||
@ -773,17 +773,17 @@ void intel_guc_init(struct drm_i915_private *dev_priv)
|
||||
*/
|
||||
void intel_guc_fini(struct drm_i915_private *dev_priv)
|
||||
{
|
||||
struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
|
||||
struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
|
||||
|
||||
mutex_lock(&dev_priv->drm.struct_mutex);
|
||||
guc_interrupts_release(dev_priv);
|
||||
i915_guc_submission_disable(dev_priv);
|
||||
i915_guc_submission_fini(dev_priv);
|
||||
|
||||
if (guc_fw->guc_fw_obj)
|
||||
i915_gem_object_put(guc_fw->guc_fw_obj);
|
||||
guc_fw->guc_fw_obj = NULL;
|
||||
if (guc_fw->obj)
|
||||
i915_gem_object_put(guc_fw->obj);
|
||||
guc_fw->obj = NULL;
|
||||
mutex_unlock(&dev_priv->drm.struct_mutex);
|
||||
|
||||
guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
|
||||
guc_fw->fetch_status = INTEL_UC_FIRMWARE_NONE;
|
||||
}
|
||||
|
@ -93,28 +93,28 @@ struct i915_guc_client {
|
||||
uint64_t submissions[I915_NUM_ENGINES];
|
||||
};
|
||||
|
||||
enum intel_guc_fw_status {
|
||||
GUC_FIRMWARE_FAIL = -1,
|
||||
GUC_FIRMWARE_NONE = 0,
|
||||
GUC_FIRMWARE_PENDING,
|
||||
GUC_FIRMWARE_SUCCESS
|
||||
enum intel_uc_fw_status {
|
||||
INTEL_UC_FIRMWARE_FAIL = -1,
|
||||
INTEL_UC_FIRMWARE_NONE = 0,
|
||||
INTEL_UC_FIRMWARE_PENDING,
|
||||
INTEL_UC_FIRMWARE_SUCCESS
|
||||
};
|
||||
|
||||
/*
|
||||
* This structure encapsulates all the data needed during the process
|
||||
* of fetching, caching, and loading the firmware image into the GuC.
|
||||
*/
|
||||
struct intel_guc_fw {
|
||||
const char * guc_fw_path;
|
||||
size_t guc_fw_size;
|
||||
struct drm_i915_gem_object * guc_fw_obj;
|
||||
enum intel_guc_fw_status guc_fw_fetch_status;
|
||||
enum intel_guc_fw_status guc_fw_load_status;
|
||||
struct intel_uc_fw {
|
||||
const char *path;
|
||||
size_t size;
|
||||
struct drm_i915_gem_object *obj;
|
||||
enum intel_uc_fw_status fetch_status;
|
||||
enum intel_uc_fw_status load_status;
|
||||
|
||||
uint16_t guc_fw_major_wanted;
|
||||
uint16_t guc_fw_minor_wanted;
|
||||
uint16_t guc_fw_major_found;
|
||||
uint16_t guc_fw_minor_found;
|
||||
uint16_t major_ver_wanted;
|
||||
uint16_t minor_ver_wanted;
|
||||
uint16_t major_ver_found;
|
||||
uint16_t minor_ver_found;
|
||||
|
||||
uint32_t header_size;
|
||||
uint32_t header_offset;
|
||||
@ -141,7 +141,7 @@ struct intel_guc_log {
|
||||
};
|
||||
|
||||
struct intel_guc {
|
||||
struct intel_guc_fw guc_fw;
|
||||
struct intel_uc_fw fw;
|
||||
struct intel_guc_log log;
|
||||
|
||||
/* intel_guc_recv interrupt related state */
|
||||
@ -179,9 +179,10 @@ int intel_guc_sample_forcewake(struct intel_guc *guc);
|
||||
extern void intel_guc_init(struct drm_i915_private *dev_priv);
|
||||
extern int intel_guc_setup(struct drm_i915_private *dev_priv);
|
||||
extern void intel_guc_fini(struct drm_i915_private *dev_priv);
|
||||
extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
|
||||
extern const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
|
||||
extern int intel_guc_suspend(struct drm_i915_private *dev_priv);
|
||||
extern int intel_guc_resume(struct drm_i915_private *dev_priv);
|
||||
u32 intel_guc_wopcm_size(struct drm_i915_private *dev_priv);
|
||||
|
||||
/* i915_guc_submission.c */
|
||||
int i915_guc_submission_init(struct drm_i915_private *dev_priv);
|
||||
|
Loading…
Reference in New Issue
Block a user