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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Merge remote-tracking branch 'spi/topic/checks' into spi-next
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commit
db04e17055
@ -1351,6 +1351,11 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
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struct spi_master *master = spi->master;
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struct spi_transfer *xfer;
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if (list_empty(&message->transfers))
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return -EINVAL;
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if (!message->complete)
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return -EINVAL;
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/* Half-duplex links include original MicroWire, and ones with
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* only one data pin like SPI_3WIRE (switches direction) or where
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* either MOSI or MISO is missing. They can also be caused by
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@ -1377,8 +1382,13 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
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list_for_each_entry(xfer, &message->transfers, transfer_list) {
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if (!xfer->bits_per_word)
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xfer->bits_per_word = spi->bits_per_word;
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if (!xfer->speed_hz)
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if (!xfer->speed_hz) {
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xfer->speed_hz = spi->max_speed_hz;
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if (master->max_speed_hz &&
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xfer->speed_hz > master->max_speed_hz)
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xfer->speed_hz = master->max_speed_hz;
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}
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if (master->bits_per_word_mask) {
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/* Only 32 bits fit in the mask */
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if (xfer->bits_per_word > 32)
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@ -1387,6 +1397,13 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
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BIT(xfer->bits_per_word - 1)))
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return -EINVAL;
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}
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if (xfer->speed_hz && master->min_speed_hz &&
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xfer->speed_hz < master->min_speed_hz)
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return -EINVAL;
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if (xfer->speed_hz && master->max_speed_hz &&
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xfer->speed_hz > master->max_speed_hz)
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return -EINVAL;
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}
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message->spi = spi;
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@ -233,6 +233,8 @@ static inline void spi_unregister_driver(struct spi_driver *sdrv)
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* suported. If set, the SPI core will reject any transfer with an
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* unsupported bits_per_word. If not set, this value is simply ignored,
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* and it's up to the individual driver to perform any validation.
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* @min_speed_hz: Lowest supported transfer speed
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* @max_speed_hz: Highest supported transfer speed
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* @flags: other constraints relevant to this driver
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* @bus_lock_spinlock: spinlock for SPI bus locking
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* @bus_lock_mutex: mutex for SPI bus locking
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@ -312,6 +314,10 @@ struct spi_master {
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#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
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#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
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/* limits on transfer speed */
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u32 min_speed_hz;
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u32 max_speed_hz;
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/* other constraints relevant to this driver */
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u16 flags;
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#define SPI_MASTER_HALF_DUPLEX BIT(0) /* can't do full duplex */
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