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drm/i915/tgl: Read SAGV block time from PCODE
Starting from TGL, we now need to read the SAGV block time via a PCODE mailbox, rather than having a static value. BSpec: 49326 v2: Fix up pcode val data type (Ville), tighten variable scope (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: James Ausmus <james.ausmus@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191004221449.1317-2-james.ausmus@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20191009172315.11004-2-lucas.demarchi@intel.com
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@ -8878,6 +8878,7 @@ enum {
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#define GEN9_SAGV_DISABLE 0x0
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#define GEN9_SAGV_IS_DISABLED 0x1
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#define GEN9_SAGV_ENABLE 0x3
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#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23
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#define GEN6_PCODE_DATA _MMIO(0x138128)
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#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
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#define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
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@ -3641,7 +3641,20 @@ intel_has_sagv(struct drm_i915_private *dev_priv)
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static void
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skl_setup_sagv_block_time(struct drm_i915_private *dev_priv)
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{
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if (IS_GEN(dev_priv, 11)) {
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if (INTEL_GEN(dev_priv) >= 12) {
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u32 val = 0;
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int ret;
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ret = sandybridge_pcode_read(dev_priv,
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GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
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&val, NULL);
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if (!ret) {
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dev_priv->sagv_block_time_us = val;
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return;
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}
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DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n");
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} else if (IS_GEN(dev_priv, 11)) {
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dev_priv->sagv_block_time_us = 10;
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return;
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} else if (IS_GEN(dev_priv, 10)) {
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