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Samsung mach/soc changes for v5.3

Browse Source 
Only cleanups and minor fixes.
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Merge tag 'samsung-soc-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc

Samsung mach/soc changes for v5.3

Only cleanups and minor fixes.

* tag 'samsung-soc-5.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: exynos: Cleanup cppcheck shifting warning
  ARM: exynos: Only build MCPM support if used
  ARM: exynos: Make ARCH_EXYNOS3 a default option

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-06-26 19:30:10 -07:00
commit da4d0b2891
3 changed files with 11 additions and 6 deletions
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7
arch/arm/mach-exynos/Kconfig
View File

@ -49,6 +49,7 @@ config S5P_DEV_MFC
config ARCH_EXYNOS3
bool "SAMSUNG EXYNOS3"
default y
select ARM_CPU_SUSPEND if PM
help
Samsung EXYNOS3 (Cortex-A7) SoC based systems
@ -106,7 +107,7 @@ config SOC_EXYNOS5420
bool "SAMSUNG EXYNOS5420"
default y
depends on ARCH_EXYNOS5
select MCPM if SMP
select EXYNOS_MCPM if SMP
select ARM_CCI400_PORT_CTRL
select ARM_CPU_SUSPEND
@ -115,6 +116,10 @@ config SOC_EXYNOS5800
default y
depends on SOC_EXYNOS5420
config EXYNOS_MCPM
bool
select MCPM
config EXYNOS_CPU_SUSPEND
bool
select ARM_CPU_SUSPEND

2
arch/arm/mach-exynos/Makefile
View File

@ -14,5 +14,5 @@ obj-$(CONFIG_PM_SLEEP) += suspend.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_MCPM) += mcpm-exynos.o
obj-$(CONFIG_EXYNOS_MCPM) += mcpm-exynos.o
CFLAGS_mcpm-exynos.o += -march=armv7-a

8
arch/arm/mach-exynos/suspend.c
View File

@ -268,7 +268,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)
unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
if (IS_ENABLED(CONFIG_MCPM)) {
if (IS_ENABLED(CONFIG_EXYNOS_MCPM)) {
mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
mcpm_cpu_suspend();
}
@ -285,7 +285,7 @@ static void exynos_pm_set_wakeup_mask(void)
* Set wake-up mask registers
* EXYNOS_EINT_WAKEUP_MASK is set by pinctrl driver in late suspend.
*/
pmu_raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK);
pmu_raw_writel(exynos_irqwake_intmask & ~BIT(31), S5P_WAKEUP_MASK);
}
static void exynos_pm_enter_sleep_mode(void)
@ -351,7 +351,7 @@ static void exynos5420_pm_prepare(void)
exynos_pm_enter_sleep_mode();
/* ensure at least INFORM0 has the resume address */
if (IS_ENABLED(CONFIG_MCPM))
if (IS_ENABLED(CONFIG_EXYNOS_MCPM))
pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0);
tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0));
@ -455,7 +455,7 @@ static void exynos5420_prepare_pm_resume(void)
mpidr = read_cpuid_mpidr();
cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
if (IS_ENABLED(CONFIG_MCPM))
if (IS_ENABLED(CONFIG_EXYNOS_MCPM))
WARN_ON(mcpm_cpu_powered_up());
if (IS_ENABLED(CONFIG_HW_PERF_EVENTS) && cluster != 0) {