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ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
Enable L2 cache parity and ECC on the db-xc3-24g4xg board so that cache operations are protected and errors can be flagged to the EDAC subsystem. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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@ -33,6 +33,11 @@ memory {
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};
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};
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&L2 {
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arm,parity-enable;
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marvell,ecc-enable;
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};
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&devbus_bootcs {
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status = "okay";
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