arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs

The VSPD includes a CLUT on RPF2. Ensure that the register space is
mapped correctly to support this.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Kieran Bingham 2018-02-14 09:55:06 +00:00 committed by Simon Horman
parent 18f1a773e3
commit d9366032b6

View File

@ -80,7 +80,7 @@ fcpvi2: fcp@fe9cf000 {
vspd3: vsp@fea38000 { vspd3: vsp@fea38000 {
compatible = "renesas,vsp2"; compatible = "renesas,vsp2";
reg = <0 0xfea38000 0 0x4000>; reg = <0 0xfea38000 0 0x8000>;
interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 620>; clocks = <&cpg CPG_MOD 620>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;