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arm64: dts: renesas: r8a7795-es1: Fix register mappings on VSPs
The VSPD includes a CLUT on RPF2. Ensure that the register space is mapped correctly to support this. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -80,7 +80,7 @@ fcpvi2: fcp@fe9cf000 {
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vspd3: vsp@fea38000 {
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vspd3: vsp@fea38000 {
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compatible = "renesas,vsp2";
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compatible = "renesas,vsp2";
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reg = <0 0xfea38000 0 0x4000>;
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reg = <0 0xfea38000 0 0x8000>;
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interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 620>;
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clocks = <&cpg CPG_MOD 620>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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