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drm: rcar-du: Store V4L2 fourcc in rcar_du_format_info structure
The mapping between DRM and V4L2 fourcc's is stored in two separate tables in rcar_du_vsp.c. In order to make it reusable to implement writeback support, move it to the rcar_du_format_info structure. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
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@ -34,60 +34,70 @@
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static const struct rcar_du_format_info rcar_du_format_infos[] = {
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{
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.fourcc = DRM_FORMAT_RGB565,
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.v4l2 = V4L2_PIX_FMT_RGB565,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_ARGB1555,
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.v4l2 = V4L2_PIX_FMT_ARGB555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB1555,
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.v4l2 = V4L2_PIX_FMT_XRGB555,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_XRGB8888,
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.v4l2 = V4L2_PIX_FMT_XBGR32,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_RGB888,
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}, {
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.fourcc = DRM_FORMAT_ARGB8888,
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.v4l2 = V4L2_PIX_FMT_ABGR32,
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.bpp = 32,
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.planes = 1,
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.pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
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.edf = PnDDCR4_EDF_ARGB8888,
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}, {
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.fourcc = DRM_FORMAT_UYVY,
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.v4l2 = V4L2_PIX_FMT_UYVY,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_YUYV,
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.v4l2 = V4L2_PIX_FMT_YUYV,
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.bpp = 16,
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.planes = 1,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV12,
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.v4l2 = V4L2_PIX_FMT_NV12M,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV21,
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.v4l2 = V4L2_PIX_FMT_NV21M,
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.bpp = 12,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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.edf = PnDDCR4_EDF_NONE,
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}, {
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.fourcc = DRM_FORMAT_NV16,
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.v4l2 = V4L2_PIX_FMT_NV16M,
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.bpp = 16,
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.planes = 2,
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.pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
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@ -99,62 +109,77 @@ static const struct rcar_du_format_info rcar_du_format_infos[] = {
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*/
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{
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.fourcc = DRM_FORMAT_RGB332,
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.v4l2 = V4L2_PIX_FMT_RGB332,
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.bpp = 8,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_ARGB4444,
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.v4l2 = V4L2_PIX_FMT_ARGB444,
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.bpp = 16,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_XRGB4444,
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.v4l2 = V4L2_PIX_FMT_XRGB444,
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.bpp = 16,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_BGR888,
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.v4l2 = V4L2_PIX_FMT_RGB24,
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.bpp = 24,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_RGB888,
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.v4l2 = V4L2_PIX_FMT_BGR24,
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.bpp = 24,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_BGRA8888,
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.v4l2 = V4L2_PIX_FMT_ARGB32,
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.bpp = 32,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_BGRX8888,
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.v4l2 = V4L2_PIX_FMT_XRGB32,
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.bpp = 32,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_YVYU,
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.v4l2 = V4L2_PIX_FMT_YVYU,
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.bpp = 16,
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.planes = 1,
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}, {
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.fourcc = DRM_FORMAT_NV61,
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.v4l2 = V4L2_PIX_FMT_NV61M,
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.bpp = 16,
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.planes = 2,
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}, {
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.fourcc = DRM_FORMAT_YUV420,
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.v4l2 = V4L2_PIX_FMT_YUV420M,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU420,
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.v4l2 = V4L2_PIX_FMT_YVU420M,
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.bpp = 12,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV422,
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.v4l2 = V4L2_PIX_FMT_YUV422M,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU422,
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.v4l2 = V4L2_PIX_FMT_YVU422M,
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.bpp = 16,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YUV444,
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.v4l2 = V4L2_PIX_FMT_YUV444M,
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.bpp = 24,
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.planes = 3,
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}, {
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.fourcc = DRM_FORMAT_YVU444,
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.v4l2 = V4L2_PIX_FMT_YVU444M,
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.bpp = 24,
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.planes = 3,
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},
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@ -19,6 +19,7 @@ struct rcar_du_device;
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struct rcar_du_format_info {
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u32 fourcc;
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u32 v4l2;
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unsigned int bpp;
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unsigned int planes;
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unsigned int pnmr;
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@ -110,8 +110,7 @@ void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
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vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
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}
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/* Keep the two tables in sync. */
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static const u32 formats_kms[] = {
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static const u32 rcar_du_vsp_formats[] = {
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DRM_FORMAT_RGB332,
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DRM_FORMAT_ARGB4444,
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DRM_FORMAT_XRGB4444,
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@ -139,40 +138,13 @@ static const u32 formats_kms[] = {
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DRM_FORMAT_YVU444,
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};
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static const u32 formats_v4l2[] = {
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V4L2_PIX_FMT_RGB332,
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V4L2_PIX_FMT_ARGB444,
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V4L2_PIX_FMT_XRGB444,
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V4L2_PIX_FMT_ARGB555,
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V4L2_PIX_FMT_XRGB555,
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V4L2_PIX_FMT_RGB565,
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V4L2_PIX_FMT_RGB24,
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V4L2_PIX_FMT_BGR24,
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V4L2_PIX_FMT_ARGB32,
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V4L2_PIX_FMT_XRGB32,
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V4L2_PIX_FMT_ABGR32,
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V4L2_PIX_FMT_XBGR32,
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V4L2_PIX_FMT_UYVY,
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V4L2_PIX_FMT_YUYV,
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V4L2_PIX_FMT_YVYU,
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V4L2_PIX_FMT_NV12M,
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V4L2_PIX_FMT_NV21M,
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V4L2_PIX_FMT_NV16M,
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V4L2_PIX_FMT_NV61M,
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V4L2_PIX_FMT_YUV420M,
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V4L2_PIX_FMT_YVU420M,
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V4L2_PIX_FMT_YUV422M,
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V4L2_PIX_FMT_YVU422M,
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V4L2_PIX_FMT_YUV444M,
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V4L2_PIX_FMT_YVU444M,
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};
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static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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{
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struct rcar_du_vsp_plane_state *state =
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to_rcar_vsp_plane_state(plane->plane.state);
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struct rcar_du_crtc *crtc = to_rcar_crtc(state->state.crtc);
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struct drm_framebuffer *fb = plane->plane.state->fb;
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const struct rcar_du_format_info *format;
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struct vsp1_du_atomic_config cfg = {
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.pixelformat = 0,
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.pitch = fb->pitches[0],
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@ -195,12 +167,8 @@ static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
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cfg.mem[i] = sg_dma_address(state->sg_tables[i].sgl)
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+ fb->offsets[i];
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for (i = 0; i < ARRAY_SIZE(formats_kms); ++i) {
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if (formats_kms[i] == state->format->fourcc) {
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cfg.pixelformat = formats_v4l2[i];
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break;
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}
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}
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format = rcar_du_format_info(state->format->fourcc);
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cfg.pixelformat = format->v4l2;
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vsp1_du_atomic_update(plane->vsp->vsp, crtc->vsp_pipe,
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plane->index, &cfg);
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@ -395,8 +363,8 @@ int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
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ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs,
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&rcar_du_vsp_plane_funcs,
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formats_kms,
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ARRAY_SIZE(formats_kms),
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rcar_du_vsp_formats,
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ARRAY_SIZE(rcar_du_vsp_formats),
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NULL, type, NULL);
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if (ret < 0)
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return ret;
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