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drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switching
The logic has moved to cgs. mclk switching with DC at higher refresh rates should work. Reviewed-by: Eric Huang <JinhuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <harry.wentland@amd.com>
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@ -2909,8 +2909,7 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
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else
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disable_mclk_switching = ((1 < info.display_count) ||
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disable_mclk_switching_for_frame_lock ||
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smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us) ||
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(mode_info.refresh_rate > 120));
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smu7_vblank_too_short(hwmgr, mode_info.vblank_time_us));
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sclk = smu7_ps->performance_levels[0].engine_clock;
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mclk = smu7_ps->performance_levels[0].memory_clock;
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