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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 12:00:58 +07:00
PCI/MSI: Support allocating virtual MSI interrupts
For NTB devices, we want to be able to trigger MSI interrupts through a memory window. In these cases we may want to use more interrupts than the NTB PCI device has available in its MSI-X table. We allow for this by creating a new 'virtual' interrupt. These interrupts are allocated as usual but are not programmed into the MSI-X table (as there may not be space for them). The MSI address and data will then handled through an NTB MSI library introduced later in this series. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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@ -192,6 +192,9 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
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static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
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{
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{
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if (desc->msi_attrib.is_virtual)
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return NULL;
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return desc->mask_base +
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return desc->mask_base +
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desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
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desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
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}
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}
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@ -206,14 +209,19 @@ static void __iomem *pci_msix_desc_addr(struct msi_desc *desc)
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u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
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u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag)
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{
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{
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u32 mask_bits = desc->masked;
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u32 mask_bits = desc->masked;
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void __iomem *desc_addr;
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if (pci_msi_ignore_mask)
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if (pci_msi_ignore_mask)
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return 0;
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return 0;
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desc_addr = pci_msix_desc_addr(desc);
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if (!desc_addr)
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return 0;
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mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
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mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
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if (flag)
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if (flag)
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mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
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mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
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writel(mask_bits, pci_msix_desc_addr(desc) + PCI_MSIX_ENTRY_VECTOR_CTRL);
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writel(mask_bits, desc_addr + PCI_MSIX_ENTRY_VECTOR_CTRL);
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return mask_bits;
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return mask_bits;
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}
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}
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@ -273,6 +281,11 @@ void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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if (entry->msi_attrib.is_msix) {
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if (entry->msi_attrib.is_msix) {
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void __iomem *base = pci_msix_desc_addr(entry);
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void __iomem *base = pci_msix_desc_addr(entry);
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if (!base) {
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WARN_ON(1);
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return;
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}
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msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
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msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR);
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msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
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msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR);
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msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
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msg->data = readl(base + PCI_MSIX_ENTRY_DATA);
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@ -303,6 +316,9 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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} else if (entry->msi_attrib.is_msix) {
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} else if (entry->msi_attrib.is_msix) {
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void __iomem *base = pci_msix_desc_addr(entry);
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void __iomem *base = pci_msix_desc_addr(entry);
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if (!base)
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goto skip;
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writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
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writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR);
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writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
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writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR);
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writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
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writel(msg->data, base + PCI_MSIX_ENTRY_DATA);
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@ -327,7 +343,13 @@ void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
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msg->data);
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msg->data);
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}
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}
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}
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}
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skip:
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entry->msg = *msg;
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entry->msg = *msg;
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if (entry->write_msi_msg)
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entry->write_msi_msg(entry, entry->write_msi_msg_data);
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}
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}
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void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
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void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg)
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@ -550,6 +572,7 @@ msi_setup_entry(struct pci_dev *dev, int nvec, struct irq_affinity *affd)
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entry->msi_attrib.is_msix = 0;
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entry->msi_attrib.is_msix = 0;
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entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
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entry->msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
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entry->msi_attrib.is_virtual = 0;
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entry->msi_attrib.entry_nr = 0;
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entry->msi_attrib.entry_nr = 0;
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entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
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entry->msi_attrib.maskbit = !!(control & PCI_MSI_FLAGS_MASKBIT);
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entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
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entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
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@ -674,6 +697,7 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
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struct irq_affinity_desc *curmsk, *masks = NULL;
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struct irq_affinity_desc *curmsk, *masks = NULL;
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struct msi_desc *entry;
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struct msi_desc *entry;
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int ret, i;
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int ret, i;
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int vec_count = pci_msix_vec_count(dev);
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if (affd)
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if (affd)
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masks = irq_create_affinity_masks(nvec, affd);
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masks = irq_create_affinity_masks(nvec, affd);
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@ -696,6 +720,10 @@ static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
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entry->msi_attrib.entry_nr = entries[i].entry;
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entry->msi_attrib.entry_nr = entries[i].entry;
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else
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else
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entry->msi_attrib.entry_nr = i;
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entry->msi_attrib.entry_nr = i;
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entry->msi_attrib.is_virtual =
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entry->msi_attrib.entry_nr >= vec_count;
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entry->msi_attrib.default_irq = dev->irq;
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entry->msi_attrib.default_irq = dev->irq;
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entry->mask_base = base;
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entry->mask_base = base;
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@ -714,12 +742,19 @@ static void msix_program_entries(struct pci_dev *dev,
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{
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{
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struct msi_desc *entry;
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struct msi_desc *entry;
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int i = 0;
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int i = 0;
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void __iomem *desc_addr;
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for_each_pci_msi_entry(entry, dev) {
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for_each_pci_msi_entry(entry, dev) {
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if (entries)
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if (entries)
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entries[i++].vector = entry->irq;
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entries[i++].vector = entry->irq;
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entry->masked = readl(pci_msix_desc_addr(entry) +
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desc_addr = pci_msix_desc_addr(entry);
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if (desc_addr)
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entry->masked = readl(desc_addr +
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PCI_MSIX_ENTRY_VECTOR_CTRL);
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PCI_MSIX_ENTRY_VECTOR_CTRL);
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else
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entry->masked = 0;
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msix_mask_irq(entry, 1);
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msix_mask_irq(entry, 1);
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}
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}
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}
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}
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@ -932,7 +967,7 @@ int pci_msix_vec_count(struct pci_dev *dev)
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EXPORT_SYMBOL(pci_msix_vec_count);
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EXPORT_SYMBOL(pci_msix_vec_count);
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static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
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static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
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int nvec, struct irq_affinity *affd)
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int nvec, struct irq_affinity *affd, int flags)
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{
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{
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int nr_entries;
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int nr_entries;
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int i, j;
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int i, j;
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@ -943,7 +978,7 @@ static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries,
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nr_entries = pci_msix_vec_count(dev);
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nr_entries = pci_msix_vec_count(dev);
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if (nr_entries < 0)
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if (nr_entries < 0)
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return nr_entries;
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return nr_entries;
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if (nvec > nr_entries)
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if (nvec > nr_entries && !(flags & PCI_IRQ_VIRTUAL))
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return nr_entries;
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return nr_entries;
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if (entries) {
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if (entries) {
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@ -1079,7 +1114,8 @@ EXPORT_SYMBOL(pci_enable_msi);
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static int __pci_enable_msix_range(struct pci_dev *dev,
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static int __pci_enable_msix_range(struct pci_dev *dev,
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struct msix_entry *entries, int minvec,
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struct msix_entry *entries, int minvec,
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int maxvec, struct irq_affinity *affd)
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int maxvec, struct irq_affinity *affd,
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int flags)
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{
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{
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int rc, nvec = maxvec;
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int rc, nvec = maxvec;
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@ -1096,7 +1132,7 @@ static int __pci_enable_msix_range(struct pci_dev *dev,
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return -ENOSPC;
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return -ENOSPC;
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}
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}
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rc = __pci_enable_msix(dev, entries, nvec, affd);
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rc = __pci_enable_msix(dev, entries, nvec, affd, flags);
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if (rc == 0)
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if (rc == 0)
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return nvec;
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return nvec;
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@ -1127,7 +1163,7 @@ static int __pci_enable_msix_range(struct pci_dev *dev,
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int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
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int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
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int minvec, int maxvec)
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int minvec, int maxvec)
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{
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{
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return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL);
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return __pci_enable_msix_range(dev, entries, minvec, maxvec, NULL, 0);
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}
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}
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EXPORT_SYMBOL(pci_enable_msix_range);
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EXPORT_SYMBOL(pci_enable_msix_range);
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@ -1167,7 +1203,7 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs,
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if (flags & PCI_IRQ_MSIX) {
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if (flags & PCI_IRQ_MSIX) {
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msix_vecs = __pci_enable_msix_range(dev, NULL, min_vecs,
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msix_vecs = __pci_enable_msix_range(dev, NULL, min_vecs,
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max_vecs, affd);
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max_vecs, affd, flags);
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if (msix_vecs > 0)
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if (msix_vecs > 0)
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return msix_vecs;
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return msix_vecs;
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}
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}
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@ -64,6 +64,10 @@ struct ti_sci_inta_msi_desc {
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* @msg: The last set MSI message cached for reuse
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* @msg: The last set MSI message cached for reuse
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* @affinity: Optional pointer to a cpu affinity mask for this descriptor
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* @affinity: Optional pointer to a cpu affinity mask for this descriptor
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*
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*
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* @write_msi_msg: Callback that may be called when the MSI message
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* address or data changes
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* @write_msi_msg_data: Data parameter for the callback.
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*
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* @masked: [PCI MSI/X] Mask bits
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* @masked: [PCI MSI/X] Mask bits
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* @is_msix: [PCI MSI/X] True if MSI-X
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* @is_msix: [PCI MSI/X] True if MSI-X
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* @multiple: [PCI MSI/X] log2 num of messages allocated
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* @multiple: [PCI MSI/X] log2 num of messages allocated
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@ -90,6 +94,9 @@ struct msi_desc {
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const void *iommu_cookie;
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const void *iommu_cookie;
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#endif
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#endif
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void (*write_msi_msg)(struct msi_desc *entry, void *data);
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void *write_msi_msg_data;
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union {
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union {
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/* PCI MSI/X specific data */
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/* PCI MSI/X specific data */
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struct {
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struct {
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@ -100,6 +107,7 @@ struct msi_desc {
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u8 multi_cap : 3;
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u8 multi_cap : 3;
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u8 maskbit : 1;
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u8 maskbit : 1;
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u8 is_64 : 1;
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u8 is_64 : 1;
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u8 is_virtual : 1;
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u16 entry_nr;
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u16 entry_nr;
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unsigned default_irq;
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unsigned default_irq;
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} msi_attrib;
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} msi_attrib;
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@ -1362,6 +1362,15 @@ int pci_set_vga_state(struct pci_dev *pdev, bool decode,
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#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
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#define PCI_IRQ_MSI (1 << 1) /* Allow MSI interrupts */
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#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
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#define PCI_IRQ_MSIX (1 << 2) /* Allow MSI-X interrupts */
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#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
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#define PCI_IRQ_AFFINITY (1 << 3) /* Auto-assign affinity */
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/*
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* Virtual interrupts allow for more interrupts to be allocated
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* than the device has interrupts for. These are not programmed
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* into the device's MSI-X table and must be handled by some
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* other driver means.
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*/
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#define PCI_IRQ_VIRTUAL (1 << 4)
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#define PCI_IRQ_ALL_TYPES \
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#define PCI_IRQ_ALL_TYPES \
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(PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
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(PCI_IRQ_LEGACY | PCI_IRQ_MSI | PCI_IRQ_MSIX)
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