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arm64: dts: renesas: Add HiHope RZ/G2N Rev.3.0/4.0 main board support

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Add support for HiHope RZ/G2N Rev.3.0/4.0 main board support based on
r8a774b1 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1593004330-5039-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2020-06-24 14:12:08 +01:00 committed by Geert Uytterhoeven
parent 51fb6306d0
commit d728a4476a
3 changed files with 45 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm64/boot/dts/renesas/Makefile
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@ -5,7 +5,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb \
r8a774a1-hihope-rzg2m-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb \
r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb \
r8a774b1-hihope-rzg2n-rev2.dtb
dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-rev2-ex.dtb
dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \
r8a774c0-ek874-idk-2121wr.dtb \

41
arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n.dts Normal file
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@ -0,0 +1,41 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the HiHope RZ/G2N main board Rev.3.0/4.0
*
* Copyright (C) 2020 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r8a774b1.dtsi"
#include "hihope-rev4.dtsi"
/ {
model = "HopeRun HiHope RZ/G2N main board based on r8a774b1";
compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@480000000 {
device_type = "memory";
reg = <0x4 0x80000000 0x0 0x80000000>;
};
};
&du {
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.3",
"dclkin.0", "dclkin.1", "dclkin.3";
};
&sdhi3 {
mmc-hs400-1_8v;
};

2
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
View File

@ -10,6 +10,8 @@
#include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
#include <dt-bindings/power/r8a774b1-sysc.h>
#define CPG_AUDIO_CLK_I R8A774B1_CLK_S0D4
/ {
compatible = "renesas,r8a774b1";
#address-cells = <2>;