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drm/amd/display: Keep blank until set visibility to true after mode switch
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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e75504b129
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d70ccd4a65
@ -1609,12 +1609,10 @@ void dc_update_surfaces_and_stream(struct dc *dc,
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if (!pipe_ctx->surface || pipe_ctx->top_pipe)
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continue;
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if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) {
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core_dc->hwss.pipe_control_lock(
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core_dc,
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pipe_ctx,
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true);
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}
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core_dc->hwss.pipe_control_lock(
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core_dc,
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pipe_ctx,
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true);
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}
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if (update_type == UPDATE_TYPE_FULL)
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break;
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@ -1697,12 +1695,11 @@ void dc_update_surfaces_and_stream(struct dc *dc,
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if (!pipe_ctx->surface || pipe_ctx->top_pipe)
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continue;
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if (!pipe_ctx->tg->funcs->is_blanked(pipe_ctx->tg)) {
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core_dc->hwss.pipe_control_lock(
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core_dc,
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pipe_ctx,
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false);
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}
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core_dc->hwss.pipe_control_lock(
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core_dc,
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pipe_ctx,
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false);
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break;
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}
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}
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@ -52,6 +52,10 @@ void dce_pipe_control_lock(struct core_dc *dc,
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uint32_t dcp_grph, scl, blnd, update_lock_mode, val;
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struct dce_hwseq *hws = dc->hwseq;
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/* Not lock pipe when blank */
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if (lock && pipe->tg->funcs->is_blanked(pipe->tg))
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return;
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val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->pipe_idx],
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BLND_DCP_GRPH_V_UPDATE_LOCK, &dcp_grph,
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BLND_SCL_V_UPDATE_LOCK, &scl,
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