mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-27 06:30:56 +07:00
drm/nv50-/disp: add method descriptions for debugging
Lists of known methods for the DMA channel classes, and mappings to their priv register addresses (where known). Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
117e16335b
commit
d67d92c066
@ -226,6 +226,177 @@ nv50_disp_dmac_fini(struct nouveau_object *object, bool suspend)
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* EVO master channel object
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******************************************************************************/
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static void
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nv50_disp_mthd_list(struct nv50_disp_priv *priv, int debug, u32 base, int c,
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const struct nv50_disp_mthd_list *list, int inst)
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{
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struct nouveau_object *disp = nv_object(priv);
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int i;
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for (i = 0; list->data[i].mthd; i++) {
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if (list->data[i].addr) {
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u32 next = nv_rd32(priv, list->data[i].addr + base + 0);
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u32 prev = nv_rd32(priv, list->data[i].addr + base + c);
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u32 mthd = list->data[i].mthd + (list->mthd * inst);
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const char *name = list->data[i].name;
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char mods[16];
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if (prev != next)
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snprintf(mods, sizeof(mods), "-> 0x%08x", next);
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else
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snprintf(mods, sizeof(mods), "%13c", ' ');
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nv_printk_(disp, debug, "\t0x%04x: 0x%08x %s%s%s\n",
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mthd, prev, mods, name ? " // " : "",
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name ? name : "");
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}
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}
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}
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void
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nv50_disp_mthd_chan(struct nv50_disp_priv *priv, int debug, int head,
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const struct nv50_disp_mthd_chan *chan)
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{
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struct nouveau_object *disp = nv_object(priv);
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const struct nv50_disp_impl *impl = (void *)disp->oclass;
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const struct nv50_disp_mthd_list *list;
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int i, j;
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if (debug > nv_subdev(priv)->debug)
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return;
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for (i = 0; (list = chan->data[i].mthd) != NULL; i++) {
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u32 base = head * chan->addr;
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for (j = 0; j < chan->data[i].nr; j++, base += list->addr) {
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const char *cname = chan->name;
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const char *sname = "";
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char cname_[16], sname_[16];
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if (chan->addr) {
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snprintf(cname_, sizeof(cname_), "%s %d",
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chan->name, head);
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cname = cname_;
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}
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if (chan->data[i].nr > 1) {
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snprintf(sname_, sizeof(sname_), " - %s %d",
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chan->data[i].name, j);
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sname = sname_;
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}
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nv_printk_(disp, debug, "%s%s:\n", cname, sname);
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nv50_disp_mthd_list(priv, debug, base, impl->mthd.prev,
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list, j);
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}
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}
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}
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const struct nv50_disp_mthd_list
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nv50_disp_mast_mthd_base = {
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.mthd = 0x0000,
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.addr = 0x000000,
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.data = {
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{ 0x0080, 0x000000 },
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{ 0x0084, 0x610bb8 },
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{ 0x0088, 0x610b9c },
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{ 0x008c, 0x000000 },
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{}
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}
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};
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static const struct nv50_disp_mthd_list
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nv50_disp_mast_mthd_dac = {
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.mthd = 0x0080,
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.addr = 0x000008,
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.data = {
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{ 0x0400, 0x610b58 },
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{ 0x0404, 0x610bdc },
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{ 0x0420, 0x610828 },
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{}
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}
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};
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const struct nv50_disp_mthd_list
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nv50_disp_mast_mthd_sor = {
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.mthd = 0x0040,
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.addr = 0x000008,
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.data = {
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{ 0x0600, 0x610b70 },
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{}
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}
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};
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const struct nv50_disp_mthd_list
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nv50_disp_mast_mthd_pior = {
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.mthd = 0x0040,
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.addr = 0x000008,
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.data = {
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{ 0x0700, 0x610b80 },
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{}
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}
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};
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static const struct nv50_disp_mthd_list
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nv50_disp_mast_mthd_head = {
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.mthd = 0x0400,
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.addr = 0x000540,
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.data = {
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{ 0x0800, 0x610ad8 },
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{ 0x0804, 0x610ad0 },
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{ 0x0808, 0x610a48 },
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{ 0x080c, 0x610a78 },
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{ 0x0810, 0x610ac0 },
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{ 0x0814, 0x610af8 },
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{ 0x0818, 0x610b00 },
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{ 0x081c, 0x610ae8 },
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{ 0x0820, 0x610af0 },
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{ 0x0824, 0x610b08 },
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{ 0x0828, 0x610b10 },
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{ 0x082c, 0x610a68 },
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{ 0x0830, 0x610a60 },
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{ 0x0834, 0x000000 },
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{ 0x0838, 0x610a40 },
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{ 0x0840, 0x610a24 },
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{ 0x0844, 0x610a2c },
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{ 0x0848, 0x610aa8 },
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{ 0x084c, 0x610ab0 },
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{ 0x0860, 0x610a84 },
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{ 0x0864, 0x610a90 },
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{ 0x0868, 0x610b18 },
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{ 0x086c, 0x610b20 },
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{ 0x0870, 0x610ac8 },
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{ 0x0874, 0x610a38 },
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{ 0x0880, 0x610a58 },
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{ 0x0884, 0x610a9c },
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{ 0x08a0, 0x610a70 },
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{ 0x08a4, 0x610a50 },
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{ 0x08a8, 0x610ae0 },
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{ 0x08c0, 0x610b28 },
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{ 0x08c4, 0x610b30 },
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{ 0x08c8, 0x610b40 },
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{ 0x08d4, 0x610b38 },
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{ 0x08d8, 0x610b48 },
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{ 0x08dc, 0x610b50 },
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{ 0x0900, 0x610a18 },
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{ 0x0904, 0x610ab8 },
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{}
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}
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};
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static const struct nv50_disp_mthd_chan
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nv50_disp_mast_mthd_chan = {
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.name = "Core",
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.addr = 0x000000,
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.data = {
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{ "Global", 1, &nv50_disp_mast_mthd_base },
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{ "DAC", 3, &nv50_disp_mast_mthd_dac },
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{ "SOR", 2, &nv50_disp_mast_mthd_sor },
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{ "PIOR", 3, &nv50_disp_mast_mthd_pior },
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{ "HEAD", 2, &nv50_disp_mast_mthd_head },
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{}
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}
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};
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static int
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nv50_disp_mast_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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@ -322,6 +493,56 @@ nv50_disp_mast_ofuncs = {
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* EVO sync channel objects
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******************************************************************************/
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static const struct nv50_disp_mthd_list
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nv50_disp_sync_mthd_base = {
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.mthd = 0x0000,
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.addr = 0x000000,
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.data = {
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{ 0x0080, 0x000000 },
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{ 0x0084, 0x0008c4 },
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{ 0x0088, 0x0008d0 },
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{ 0x008c, 0x0008dc },
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{ 0x0090, 0x0008e4 },
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{ 0x0094, 0x610884 },
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{ 0x00a0, 0x6108a0 },
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{ 0x00a4, 0x610878 },
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{ 0x00c0, 0x61086c },
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{ 0x00e0, 0x610858 },
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{ 0x00e4, 0x610860 },
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{ 0x00e8, 0x6108ac },
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{ 0x00ec, 0x6108b4 },
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{ 0x0100, 0x610894 },
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{ 0x0110, 0x6108bc },
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{ 0x0114, 0x61088c },
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{}
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}
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};
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const struct nv50_disp_mthd_list
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nv50_disp_sync_mthd_image = {
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.mthd = 0x0400,
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.addr = 0x000000,
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.data = {
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{ 0x0800, 0x6108f0 },
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{ 0x0804, 0x6108fc },
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{ 0x0808, 0x61090c },
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{ 0x080c, 0x610914 },
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{ 0x0810, 0x610904 },
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{}
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}
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};
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static const struct nv50_disp_mthd_chan
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nv50_disp_sync_mthd_chan = {
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.name = "Base",
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.addr = 0x000540,
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.data = {
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{ "Global", 1, &nv50_disp_sync_mthd_base },
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{ "Image", 2, &nv50_disp_sync_mthd_image },
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{}
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}
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};
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static int
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nv50_disp_sync_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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@ -361,6 +582,44 @@ nv50_disp_sync_ofuncs = {
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* EVO overlay channel objects
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******************************************************************************/
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const struct nv50_disp_mthd_list
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nv50_disp_ovly_mthd_base = {
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.mthd = 0x0000,
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.addr = 0x000000,
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.data = {
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{ 0x0080, 0x000000 },
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{ 0x0084, 0x0009a0 },
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{ 0x0088, 0x0009c0 },
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{ 0x008c, 0x0009c8 },
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{ 0x0090, 0x6109b4 },
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{ 0x0094, 0x610970 },
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{ 0x00a0, 0x610998 },
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{ 0x00a4, 0x610964 },
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{ 0x00c0, 0x610958 },
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{ 0x00e0, 0x6109a8 },
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{ 0x00e4, 0x6109d0 },
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{ 0x00e8, 0x6109d8 },
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{ 0x0100, 0x61094c },
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{ 0x0104, 0x610984 },
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{ 0x0108, 0x61098c },
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{ 0x0800, 0x6109f8 },
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{ 0x0808, 0x610a08 },
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{ 0x080c, 0x610a10 },
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{ 0x0810, 0x610a00 },
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{}
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}
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};
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static const struct nv50_disp_mthd_chan
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nv50_disp_ovly_mthd_chan = {
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.name = "Overlay",
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.addr = 0x000540,
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.data = {
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{ "Global", 1, &nv50_disp_ovly_mthd_base },
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{}
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}
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};
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static int
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nv50_disp_ovly_ctor(struct nouveau_object *parent,
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struct nouveau_object *engine,
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@ -1376,4 +1635,8 @@ nv50_disp_oclass = &(struct nv50_disp_impl) {
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.init = _nouveau_disp_init,
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.fini = _nouveau_disp_fini,
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},
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.mthd.core = &nv50_disp_mast_mthd_chan,
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.mthd.base = &nv50_disp_sync_mthd_chan,
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.mthd.ovly = &nv50_disp_ovly_mthd_chan,
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.mthd.prev = 0x000004,
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}.base.base;
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@ -14,6 +14,12 @@
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struct nv50_disp_impl {
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struct nouveau_disp_impl base;
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struct {
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const struct nv50_disp_mthd_chan *core;
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const struct nv50_disp_mthd_chan *base;
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const struct nv50_disp_mthd_chan *ovly;
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int prev;
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} mthd;
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};
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struct nv50_disp_priv {
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@ -128,21 +134,60 @@ struct nv50_disp_pioc {
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struct nv50_disp_chan base;
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};
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struct nv50_disp_mthd_list {
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u32 mthd;
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u32 addr;
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struct {
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u32 mthd;
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u32 addr;
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const char *name;
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} data[];
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};
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struct nv50_disp_mthd_chan {
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const char *name;
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u32 addr;
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struct {
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const char *name;
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int nr;
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const struct nv50_disp_mthd_list *mthd;
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} data[];
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};
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extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
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extern const struct nv50_disp_mthd_list nv50_disp_mast_mthd_base;
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extern const struct nv50_disp_mthd_list nv50_disp_mast_mthd_sor;
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extern const struct nv50_disp_mthd_list nv50_disp_mast_mthd_pior;
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extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
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extern const struct nv50_disp_mthd_list nv50_disp_sync_mthd_image;
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extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
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extern const struct nv50_disp_mthd_list nv50_disp_ovly_mthd_base;
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extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
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extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
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extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
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extern struct nouveau_oclass nv50_disp_cclass;
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void nv50_disp_mthd_chan(struct nv50_disp_priv *, int debug, int head,
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const struct nv50_disp_mthd_chan *);
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void nv50_disp_intr_supervisor(struct work_struct *);
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void nv50_disp_intr(struct nouveau_subdev *);
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extern const struct nv50_disp_mthd_chan nv84_disp_mast_mthd_chan;
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extern const struct nv50_disp_mthd_list nv84_disp_mast_mthd_dac;
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extern const struct nv50_disp_mthd_list nv84_disp_mast_mthd_head;
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extern const struct nv50_disp_mthd_chan nv84_disp_sync_mthd_chan;
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extern const struct nv50_disp_mthd_chan nv84_disp_ovly_mthd_chan;
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extern struct nouveau_omthds nv84_disp_base_omthds[];
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extern const struct nv50_disp_mthd_chan nv94_disp_mast_mthd_chan;
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extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
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extern const struct nv50_disp_mthd_list nvd0_disp_mast_mthd_base;
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extern const struct nv50_disp_mthd_list nvd0_disp_mast_mthd_dac;
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extern const struct nv50_disp_mthd_list nvd0_disp_mast_mthd_sor;
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extern const struct nv50_disp_mthd_list nvd0_disp_mast_mthd_pior;
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extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
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extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
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extern const struct nv50_disp_mthd_chan nvd0_disp_sync_mthd_chan;
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extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
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extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
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extern struct nouveau_omthds nvd0_disp_base_omthds[];
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@ -151,4 +196,7 @@ extern struct nouveau_oclass nvd0_disp_cclass;
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void nvd0_disp_intr_supervisor(struct work_struct *);
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void nvd0_disp_intr(struct nouveau_subdev *);
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extern const struct nv50_disp_mthd_chan nve0_disp_mast_mthd_chan;
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extern const struct nv50_disp_mthd_chan nve0_disp_ovly_mthd_chan;
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#endif
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@ -29,6 +29,175 @@
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#include "nv50.h"
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/*******************************************************************************
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* EVO master channel object
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******************************************************************************/
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const struct nv50_disp_mthd_list
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nv84_disp_mast_mthd_dac = {
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.mthd = 0x0080,
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.addr = 0x000008,
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.data = {
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{ 0x0400, 0x610b58 },
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{ 0x0404, 0x610bdc },
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{ 0x0420, 0x610bc4 },
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{}
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}
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};
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const struct nv50_disp_mthd_list
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nv84_disp_mast_mthd_head = {
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.mthd = 0x0400,
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.addr = 0x000540,
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.data = {
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{ 0x0800, 0x610ad8 },
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{ 0x0804, 0x610ad0 },
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{ 0x0808, 0x610a48 },
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{ 0x080c, 0x610a78 },
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{ 0x0810, 0x610ac0 },
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{ 0x0814, 0x610af8 },
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{ 0x0818, 0x610b00 },
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{ 0x081c, 0x610ae8 },
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{ 0x0820, 0x610af0 },
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{ 0x0824, 0x610b08 },
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{ 0x0828, 0x610b10 },
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{ 0x082c, 0x610a68 },
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{ 0x0830, 0x610a60 },
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{ 0x0834, 0x000000 },
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{ 0x0838, 0x610a40 },
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{ 0x0840, 0x610a24 },
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{ 0x0844, 0x610a2c },
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{ 0x0848, 0x610aa8 },
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{ 0x084c, 0x610ab0 },
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{ 0x085c, 0x610c5c },
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{ 0x0860, 0x610a84 },
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{ 0x0864, 0x610a90 },
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{ 0x0868, 0x610b18 },
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{ 0x086c, 0x610b20 },
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{ 0x0870, 0x610ac8 },
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{ 0x0874, 0x610a38 },
|
||||
{ 0x0878, 0x610c50 },
|
||||
{ 0x0880, 0x610a58 },
|
||||
{ 0x0884, 0x610a9c },
|
||||
{ 0x089c, 0x610c68 },
|
||||
{ 0x08a0, 0x610a70 },
|
||||
{ 0x08a4, 0x610a50 },
|
||||
{ 0x08a8, 0x610ae0 },
|
||||
{ 0x08c0, 0x610b28 },
|
||||
{ 0x08c4, 0x610b30 },
|
||||
{ 0x08c8, 0x610b40 },
|
||||
{ 0x08d4, 0x610b38 },
|
||||
{ 0x08d8, 0x610b48 },
|
||||
{ 0x08dc, 0x610b50 },
|
||||
{ 0x0900, 0x610a18 },
|
||||
{ 0x0904, 0x610ab8 },
|
||||
{ 0x0910, 0x610c70 },
|
||||
{ 0x0914, 0x610c78 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nv84_disp_mast_mthd_chan = {
|
||||
.name = "Core",
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ "Global", 1, &nv50_disp_mast_mthd_base },
|
||||
{ "DAC", 3, &nv84_disp_mast_mthd_dac },
|
||||
{ "SOR", 2, &nv50_disp_mast_mthd_sor },
|
||||
{ "PIOR", 3, &nv50_disp_mast_mthd_pior },
|
||||
{ "HEAD", 2, &nv84_disp_mast_mthd_head },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO sync channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nv84_disp_sync_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ 0x0080, 0x000000 },
|
||||
{ 0x0084, 0x0008c4 },
|
||||
{ 0x0088, 0x0008d0 },
|
||||
{ 0x008c, 0x0008dc },
|
||||
{ 0x0090, 0x0008e4 },
|
||||
{ 0x0094, 0x610884 },
|
||||
{ 0x00a0, 0x6108a0 },
|
||||
{ 0x00a4, 0x610878 },
|
||||
{ 0x00c0, 0x61086c },
|
||||
{ 0x00c4, 0x610800 },
|
||||
{ 0x00c8, 0x61080c },
|
||||
{ 0x00cc, 0x610818 },
|
||||
{ 0x00e0, 0x610858 },
|
||||
{ 0x00e4, 0x610860 },
|
||||
{ 0x00e8, 0x6108ac },
|
||||
{ 0x00ec, 0x6108b4 },
|
||||
{ 0x00fc, 0x610824 },
|
||||
{ 0x0100, 0x610894 },
|
||||
{ 0x0104, 0x61082c },
|
||||
{ 0x0110, 0x6108bc },
|
||||
{ 0x0114, 0x61088c },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nv84_disp_sync_mthd_chan = {
|
||||
.name = "Base",
|
||||
.addr = 0x000540,
|
||||
.data = {
|
||||
{ "Global", 1, &nv84_disp_sync_mthd_base },
|
||||
{ "Image", 2, &nv50_disp_sync_mthd_image },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO overlay channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nv84_disp_ovly_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ 0x0080, 0x000000 },
|
||||
{ 0x0084, 0x6109a0 },
|
||||
{ 0x0088, 0x6109c0 },
|
||||
{ 0x008c, 0x6109c8 },
|
||||
{ 0x0090, 0x6109b4 },
|
||||
{ 0x0094, 0x610970 },
|
||||
{ 0x00a0, 0x610998 },
|
||||
{ 0x00a4, 0x610964 },
|
||||
{ 0x00c0, 0x610958 },
|
||||
{ 0x00e0, 0x6109a8 },
|
||||
{ 0x00e4, 0x6109d0 },
|
||||
{ 0x00e8, 0x6109d8 },
|
||||
{ 0x0100, 0x61094c },
|
||||
{ 0x0104, 0x610984 },
|
||||
{ 0x0108, 0x61098c },
|
||||
{ 0x0800, 0x6109f8 },
|
||||
{ 0x0808, 0x610a08 },
|
||||
{ 0x080c, 0x610a10 },
|
||||
{ 0x0810, 0x610a00 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nv84_disp_ovly_mthd_chan = {
|
||||
.name = "Overlay",
|
||||
.addr = 0x000540,
|
||||
.data = {
|
||||
{ "Global", 1, &nv84_disp_ovly_mthd_base },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* Base display object
|
||||
******************************************************************************/
|
||||
@ -108,4 +277,8 @@ nv84_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nv84_disp_mast_mthd_chan,
|
||||
.mthd.base = &nv84_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nv84_disp_ovly_mthd_chan,
|
||||
.mthd.prev = 0x000004,
|
||||
}.base.base;
|
||||
|
||||
@ -29,6 +29,34 @@
|
||||
|
||||
#include "nv50.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO master channel object
|
||||
******************************************************************************/
|
||||
|
||||
const struct nv50_disp_mthd_list
|
||||
nv94_disp_mast_mthd_sor = {
|
||||
.mthd = 0x0040,
|
||||
.addr = 0x000008,
|
||||
.data = {
|
||||
{ 0x0600, 0x610794 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nv94_disp_mast_mthd_chan = {
|
||||
.name = "Core",
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ "Global", 1, &nv50_disp_mast_mthd_base },
|
||||
{ "DAC", 3, &nv84_disp_mast_mthd_dac },
|
||||
{ "SOR", 4, &nv94_disp_mast_mthd_sor },
|
||||
{ "PIOR", 3, &nv50_disp_mast_mthd_pior },
|
||||
{ "HEAD", 2, &nv84_disp_mast_mthd_head },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* Base display object
|
||||
******************************************************************************/
|
||||
@ -109,4 +137,8 @@ nv94_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nv94_disp_mast_mthd_chan,
|
||||
.mthd.base = &nv84_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nv84_disp_ovly_mthd_chan,
|
||||
.mthd.prev = 0x000004,
|
||||
}.base.base;
|
||||
|
||||
@ -29,6 +29,51 @@
|
||||
|
||||
#include "nv50.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO overlay channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nva0_disp_ovly_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ 0x0080, 0x000000 },
|
||||
{ 0x0084, 0x6109a0 },
|
||||
{ 0x0088, 0x6109c0 },
|
||||
{ 0x008c, 0x6109c8 },
|
||||
{ 0x0090, 0x6109b4 },
|
||||
{ 0x0094, 0x610970 },
|
||||
{ 0x00a0, 0x610998 },
|
||||
{ 0x00a4, 0x610964 },
|
||||
{ 0x00b0, 0x610c98 },
|
||||
{ 0x00b4, 0x610ca4 },
|
||||
{ 0x00b8, 0x610cac },
|
||||
{ 0x00c0, 0x610958 },
|
||||
{ 0x00e0, 0x6109a8 },
|
||||
{ 0x00e4, 0x6109d0 },
|
||||
{ 0x00e8, 0x6109d8 },
|
||||
{ 0x0100, 0x61094c },
|
||||
{ 0x0104, 0x610984 },
|
||||
{ 0x0108, 0x61098c },
|
||||
{ 0x0800, 0x6109f8 },
|
||||
{ 0x0808, 0x610a08 },
|
||||
{ 0x080c, 0x610a10 },
|
||||
{ 0x0810, 0x610a00 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct nv50_disp_mthd_chan
|
||||
nva0_disp_ovly_mthd_chan = {
|
||||
.name = "Overlay",
|
||||
.addr = 0x000540,
|
||||
.data = {
|
||||
{ "Global", 1, &nva0_disp_ovly_mthd_base },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* Base display object
|
||||
******************************************************************************/
|
||||
@ -94,4 +139,8 @@ nva0_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nv84_disp_mast_mthd_chan,
|
||||
.mthd.base = &nv84_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nva0_disp_ovly_mthd_chan,
|
||||
.mthd.prev = 0x000004,
|
||||
}.base.base;
|
||||
|
||||
@ -111,4 +111,8 @@ nva3_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nv94_disp_mast_mthd_chan,
|
||||
.mthd.base = &nv84_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nv84_disp_ovly_mthd_chan,
|
||||
.mthd.prev = 0x000004,
|
||||
}.base.base;
|
||||
|
||||
@ -124,6 +124,146 @@ nvd0_disp_dmac_fini(struct nouveau_object *object, bool suspend)
|
||||
* EVO master channel object
|
||||
******************************************************************************/
|
||||
|
||||
const struct nv50_disp_mthd_list
|
||||
nvd0_disp_mast_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ 0x0080, 0x660080 },
|
||||
{ 0x0084, 0x660084 },
|
||||
{ 0x0088, 0x660088 },
|
||||
{ 0x008c, 0x000000 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_list
|
||||
nvd0_disp_mast_mthd_dac = {
|
||||
.mthd = 0x0020,
|
||||
.addr = 0x000020,
|
||||
.data = {
|
||||
{ 0x0180, 0x660180 },
|
||||
{ 0x0184, 0x660184 },
|
||||
{ 0x0188, 0x660188 },
|
||||
{ 0x0190, 0x660190 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_list
|
||||
nvd0_disp_mast_mthd_sor = {
|
||||
.mthd = 0x0020,
|
||||
.addr = 0x000020,
|
||||
.data = {
|
||||
{ 0x0200, 0x660200 },
|
||||
{ 0x0204, 0x660204 },
|
||||
{ 0x0208, 0x660208 },
|
||||
{ 0x0210, 0x660210 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_list
|
||||
nvd0_disp_mast_mthd_pior = {
|
||||
.mthd = 0x0020,
|
||||
.addr = 0x000020,
|
||||
.data = {
|
||||
{ 0x0300, 0x660300 },
|
||||
{ 0x0304, 0x660304 },
|
||||
{ 0x0308, 0x660308 },
|
||||
{ 0x0310, 0x660310 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nvd0_disp_mast_mthd_head = {
|
||||
.mthd = 0x0300,
|
||||
.addr = 0x000300,
|
||||
.data = {
|
||||
{ 0x0400, 0x660400 },
|
||||
{ 0x0404, 0x660404 },
|
||||
{ 0x0408, 0x660408 },
|
||||
{ 0x040c, 0x66040c },
|
||||
{ 0x0410, 0x660410 },
|
||||
{ 0x0414, 0x660414 },
|
||||
{ 0x0418, 0x660418 },
|
||||
{ 0x041c, 0x66041c },
|
||||
{ 0x0420, 0x660420 },
|
||||
{ 0x0424, 0x660424 },
|
||||
{ 0x0428, 0x660428 },
|
||||
{ 0x042c, 0x66042c },
|
||||
{ 0x0430, 0x660430 },
|
||||
{ 0x0434, 0x660434 },
|
||||
{ 0x0438, 0x660438 },
|
||||
{ 0x0440, 0x660440 },
|
||||
{ 0x0444, 0x660444 },
|
||||
{ 0x0448, 0x660448 },
|
||||
{ 0x044c, 0x66044c },
|
||||
{ 0x0450, 0x660450 },
|
||||
{ 0x0454, 0x660454 },
|
||||
{ 0x0458, 0x660458 },
|
||||
{ 0x045c, 0x66045c },
|
||||
{ 0x0460, 0x660460 },
|
||||
{ 0x0468, 0x660468 },
|
||||
{ 0x046c, 0x66046c },
|
||||
{ 0x0470, 0x660470 },
|
||||
{ 0x0474, 0x660474 },
|
||||
{ 0x0480, 0x660480 },
|
||||
{ 0x0484, 0x660484 },
|
||||
{ 0x048c, 0x66048c },
|
||||
{ 0x0490, 0x660490 },
|
||||
{ 0x0494, 0x660494 },
|
||||
{ 0x0498, 0x660498 },
|
||||
{ 0x04b0, 0x6604b0 },
|
||||
{ 0x04b8, 0x6604b8 },
|
||||
{ 0x04bc, 0x6604bc },
|
||||
{ 0x04c0, 0x6604c0 },
|
||||
{ 0x04c4, 0x6604c4 },
|
||||
{ 0x04c8, 0x6604c8 },
|
||||
{ 0x04d0, 0x6604d0 },
|
||||
{ 0x04d4, 0x6604d4 },
|
||||
{ 0x04e0, 0x6604e0 },
|
||||
{ 0x04e4, 0x6604e4 },
|
||||
{ 0x04e8, 0x6604e8 },
|
||||
{ 0x04ec, 0x6604ec },
|
||||
{ 0x04f0, 0x6604f0 },
|
||||
{ 0x04f4, 0x6604f4 },
|
||||
{ 0x04f8, 0x6604f8 },
|
||||
{ 0x04fc, 0x6604fc },
|
||||
{ 0x0500, 0x660500 },
|
||||
{ 0x0504, 0x660504 },
|
||||
{ 0x0508, 0x660508 },
|
||||
{ 0x050c, 0x66050c },
|
||||
{ 0x0510, 0x660510 },
|
||||
{ 0x0514, 0x660514 },
|
||||
{ 0x0518, 0x660518 },
|
||||
{ 0x051c, 0x66051c },
|
||||
{ 0x052c, 0x66052c },
|
||||
{ 0x0530, 0x660530 },
|
||||
{ 0x054c, 0x66054c },
|
||||
{ 0x0550, 0x660550 },
|
||||
{ 0x0554, 0x660554 },
|
||||
{ 0x0558, 0x660558 },
|
||||
{ 0x055c, 0x66055c },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct nv50_disp_mthd_chan
|
||||
nvd0_disp_mast_mthd_chan = {
|
||||
.name = "Core",
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ "Global", 1, &nvd0_disp_mast_mthd_base },
|
||||
{ "DAC", 3, &nvd0_disp_mast_mthd_dac },
|
||||
{ "SOR", 8, &nvd0_disp_mast_mthd_sor },
|
||||
{ "PIOR", 4, &nvd0_disp_mast_mthd_pior },
|
||||
{ "HEAD", 4, &nvd0_disp_mast_mthd_head },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static int
|
||||
nvd0_disp_mast_ctor(struct nouveau_object *parent,
|
||||
struct nouveau_object *engine,
|
||||
@ -216,6 +356,81 @@ nvd0_disp_mast_ofuncs = {
|
||||
* EVO sync channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nvd0_disp_sync_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ 0x0080, 0x661080 },
|
||||
{ 0x0084, 0x661084 },
|
||||
{ 0x0088, 0x661088 },
|
||||
{ 0x008c, 0x66108c },
|
||||
{ 0x0090, 0x661090 },
|
||||
{ 0x0094, 0x661094 },
|
||||
{ 0x00a0, 0x6610a0 },
|
||||
{ 0x00a4, 0x6610a4 },
|
||||
{ 0x00c0, 0x6610c0 },
|
||||
{ 0x00c4, 0x6610c4 },
|
||||
{ 0x00c8, 0x6610c8 },
|
||||
{ 0x00cc, 0x6610cc },
|
||||
{ 0x00e0, 0x6610e0 },
|
||||
{ 0x00e4, 0x6610e4 },
|
||||
{ 0x00e8, 0x6610e8 },
|
||||
{ 0x00ec, 0x6610ec },
|
||||
{ 0x00fc, 0x6610fc },
|
||||
{ 0x0100, 0x661100 },
|
||||
{ 0x0104, 0x661104 },
|
||||
{ 0x0108, 0x661108 },
|
||||
{ 0x010c, 0x66110c },
|
||||
{ 0x0110, 0x661110 },
|
||||
{ 0x0114, 0x661114 },
|
||||
{ 0x0118, 0x661118 },
|
||||
{ 0x011c, 0x66111c },
|
||||
{ 0x0130, 0x661130 },
|
||||
{ 0x0134, 0x661134 },
|
||||
{ 0x0138, 0x661138 },
|
||||
{ 0x013c, 0x66113c },
|
||||
{ 0x0140, 0x661140 },
|
||||
{ 0x0144, 0x661144 },
|
||||
{ 0x0148, 0x661148 },
|
||||
{ 0x014c, 0x66114c },
|
||||
{ 0x0150, 0x661150 },
|
||||
{ 0x0154, 0x661154 },
|
||||
{ 0x0158, 0x661158 },
|
||||
{ 0x015c, 0x66115c },
|
||||
{ 0x0160, 0x661160 },
|
||||
{ 0x0164, 0x661164 },
|
||||
{ 0x0168, 0x661168 },
|
||||
{ 0x016c, 0x66116c },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nvd0_disp_sync_mthd_image = {
|
||||
.mthd = 0x0400,
|
||||
.addr = 0x000400,
|
||||
.data = {
|
||||
{ 0x0400, 0x661400 },
|
||||
{ 0x0404, 0x661404 },
|
||||
{ 0x0408, 0x661408 },
|
||||
{ 0x040c, 0x66140c },
|
||||
{ 0x0410, 0x661410 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nvd0_disp_sync_mthd_chan = {
|
||||
.name = "Base",
|
||||
.addr = 0x001000,
|
||||
.data = {
|
||||
{ "Global", 1, &nvd0_disp_sync_mthd_base },
|
||||
{ "Image", 2, &nvd0_disp_sync_mthd_image },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static int
|
||||
nvd0_disp_sync_ctor(struct nouveau_object *parent,
|
||||
struct nouveau_object *engine,
|
||||
@ -256,6 +471,68 @@ nvd0_disp_sync_ofuncs = {
|
||||
* EVO overlay channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nvd0_disp_ovly_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.data = {
|
||||
{ 0x0080, 0x665080 },
|
||||
{ 0x0084, 0x665084 },
|
||||
{ 0x0088, 0x665088 },
|
||||
{ 0x008c, 0x66508c },
|
||||
{ 0x0090, 0x665090 },
|
||||
{ 0x0094, 0x665094 },
|
||||
{ 0x00a0, 0x6650a0 },
|
||||
{ 0x00a4, 0x6650a4 },
|
||||
{ 0x00b0, 0x6650b0 },
|
||||
{ 0x00b4, 0x6650b4 },
|
||||
{ 0x00b8, 0x6650b8 },
|
||||
{ 0x00c0, 0x6650c0 },
|
||||
{ 0x00e0, 0x6650e0 },
|
||||
{ 0x00e4, 0x6650e4 },
|
||||
{ 0x00e8, 0x6650e8 },
|
||||
{ 0x0100, 0x665100 },
|
||||
{ 0x0104, 0x665104 },
|
||||
{ 0x0108, 0x665108 },
|
||||
{ 0x010c, 0x66510c },
|
||||
{ 0x0110, 0x665110 },
|
||||
{ 0x0118, 0x665118 },
|
||||
{ 0x011c, 0x66511c },
|
||||
{ 0x0120, 0x665120 },
|
||||
{ 0x0124, 0x665124 },
|
||||
{ 0x0130, 0x665130 },
|
||||
{ 0x0134, 0x665134 },
|
||||
{ 0x0138, 0x665138 },
|
||||
{ 0x013c, 0x66513c },
|
||||
{ 0x0140, 0x665140 },
|
||||
{ 0x0144, 0x665144 },
|
||||
{ 0x0148, 0x665148 },
|
||||
{ 0x014c, 0x66514c },
|
||||
{ 0x0150, 0x665150 },
|
||||
{ 0x0154, 0x665154 },
|
||||
{ 0x0158, 0x665158 },
|
||||
{ 0x015c, 0x66515c },
|
||||
{ 0x0160, 0x665160 },
|
||||
{ 0x0164, 0x665164 },
|
||||
{ 0x0168, 0x665168 },
|
||||
{ 0x016c, 0x66516c },
|
||||
{ 0x0400, 0x665400 },
|
||||
{ 0x0408, 0x665408 },
|
||||
{ 0x040c, 0x66540c },
|
||||
{ 0x0410, 0x665410 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct nv50_disp_mthd_chan
|
||||
nvd0_disp_ovly_mthd_chan = {
|
||||
.name = "Overlay",
|
||||
.addr = 0x001000,
|
||||
.data = {
|
||||
{ "Global", 1, &nvd0_disp_ovly_mthd_base },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
static int
|
||||
nvd0_disp_ovly_ctor(struct nouveau_object *parent,
|
||||
struct nouveau_object *engine,
|
||||
@ -1044,4 +1321,8 @@ nvd0_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nvd0_disp_mast_mthd_chan,
|
||||
.mthd.base = &nvd0_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nvd0_disp_ovly_mthd_chan,
|
||||
.mthd.prev = -0x020000,
|
||||
}.base.base;
|
||||
|
||||
@ -29,6 +29,171 @@
|
||||
|
||||
#include "nv50.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO master channel object
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nve0_disp_mast_mthd_head = {
|
||||
.mthd = 0x0300,
|
||||
.addr = 0x000300,
|
||||
.data = {
|
||||
{ 0x0400, 0x660400 },
|
||||
{ 0x0404, 0x660404 },
|
||||
{ 0x0408, 0x660408 },
|
||||
{ 0x040c, 0x66040c },
|
||||
{ 0x0410, 0x660410 },
|
||||
{ 0x0414, 0x660414 },
|
||||
{ 0x0418, 0x660418 },
|
||||
{ 0x041c, 0x66041c },
|
||||
{ 0x0420, 0x660420 },
|
||||
{ 0x0424, 0x660424 },
|
||||
{ 0x0428, 0x660428 },
|
||||
{ 0x042c, 0x66042c },
|
||||
{ 0x0430, 0x660430 },
|
||||
{ 0x0434, 0x660434 },
|
||||
{ 0x0438, 0x660438 },
|
||||
{ 0x0440, 0x660440 },
|
||||
{ 0x0444, 0x660444 },
|
||||
{ 0x0448, 0x660448 },
|
||||
{ 0x044c, 0x66044c },
|
||||
{ 0x0450, 0x660450 },
|
||||
{ 0x0454, 0x660454 },
|
||||
{ 0x0458, 0x660458 },
|
||||
{ 0x045c, 0x66045c },
|
||||
{ 0x0460, 0x660460 },
|
||||
{ 0x0468, 0x660468 },
|
||||
{ 0x046c, 0x66046c },
|
||||
{ 0x0470, 0x660470 },
|
||||
{ 0x0474, 0x660474 },
|
||||
{ 0x047c, 0x66047c },
|
||||
{ 0x0480, 0x660480 },
|
||||
{ 0x0484, 0x660484 },
|
||||
{ 0x0488, 0x660488 },
|
||||
{ 0x048c, 0x66048c },
|
||||
{ 0x0490, 0x660490 },
|
||||
{ 0x0494, 0x660494 },
|
||||
{ 0x0498, 0x660498 },
|
||||
{ 0x04a0, 0x6604a0 },
|
||||
{ 0x04b0, 0x6604b0 },
|
||||
{ 0x04b8, 0x6604b8 },
|
||||
{ 0x04bc, 0x6604bc },
|
||||
{ 0x04c0, 0x6604c0 },
|
||||
{ 0x04c4, 0x6604c4 },
|
||||
{ 0x04c8, 0x6604c8 },
|
||||
{ 0x04d0, 0x6604d0 },
|
||||
{ 0x04d4, 0x6604d4 },
|
||||
{ 0x04e0, 0x6604e0 },
|
||||
{ 0x04e4, 0x6604e4 },
|
||||
{ 0x04e8, 0x6604e8 },
|
||||
{ 0x04ec, 0x6604ec },
|
||||
{ 0x04f0, 0x6604f0 },
|
||||
{ 0x04f4, 0x6604f4 },
|
||||
{ 0x04f8, 0x6604f8 },
|
||||
{ 0x04fc, 0x6604fc },
|
||||
{ 0x0500, 0x660500 },
|
||||
{ 0x0504, 0x660504 },
|
||||
{ 0x0508, 0x660508 },
|
||||
{ 0x050c, 0x66050c },
|
||||
{ 0x0510, 0x660510 },
|
||||
{ 0x0514, 0x660514 },
|
||||
{ 0x0518, 0x660518 },
|
||||
{ 0x051c, 0x66051c },
|
||||
{ 0x0520, 0x660520 },
|
||||
{ 0x0524, 0x660524 },
|
||||
{ 0x052c, 0x66052c },
|
||||
{ 0x0530, 0x660530 },
|
||||
{ 0x054c, 0x66054c },
|
||||
{ 0x0550, 0x660550 },
|
||||
{ 0x0554, 0x660554 },
|
||||
{ 0x0558, 0x660558 },
|
||||
{ 0x055c, 0x66055c },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nve0_disp_mast_mthd_chan = {
|
||||
.name = "Core",
|
||||
.addr = 0x000000,
|
||||
.data = {
|
||||
{ "Global", 1, &nvd0_disp_mast_mthd_base },
|
||||
{ "DAC", 3, &nvd0_disp_mast_mthd_dac },
|
||||
{ "SOR", 8, &nvd0_disp_mast_mthd_sor },
|
||||
{ "PIOR", 4, &nvd0_disp_mast_mthd_pior },
|
||||
{ "HEAD", 4, &nve0_disp_mast_mthd_head },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* EVO overlay channel objects
|
||||
******************************************************************************/
|
||||
|
||||
static const struct nv50_disp_mthd_list
|
||||
nve0_disp_ovly_mthd_base = {
|
||||
.mthd = 0x0000,
|
||||
.data = {
|
||||
{ 0x0080, 0x665080 },
|
||||
{ 0x0084, 0x665084 },
|
||||
{ 0x0088, 0x665088 },
|
||||
{ 0x008c, 0x66508c },
|
||||
{ 0x0090, 0x665090 },
|
||||
{ 0x0094, 0x665094 },
|
||||
{ 0x00a0, 0x6650a0 },
|
||||
{ 0x00a4, 0x6650a4 },
|
||||
{ 0x00b0, 0x6650b0 },
|
||||
{ 0x00b4, 0x6650b4 },
|
||||
{ 0x00b8, 0x6650b8 },
|
||||
{ 0x00c0, 0x6650c0 },
|
||||
{ 0x00c4, 0x6650c4 },
|
||||
{ 0x00e0, 0x6650e0 },
|
||||
{ 0x00e4, 0x6650e4 },
|
||||
{ 0x00e8, 0x6650e8 },
|
||||
{ 0x0100, 0x665100 },
|
||||
{ 0x0104, 0x665104 },
|
||||
{ 0x0108, 0x665108 },
|
||||
{ 0x010c, 0x66510c },
|
||||
{ 0x0110, 0x665110 },
|
||||
{ 0x0118, 0x665118 },
|
||||
{ 0x011c, 0x66511c },
|
||||
{ 0x0120, 0x665120 },
|
||||
{ 0x0124, 0x665124 },
|
||||
{ 0x0130, 0x665130 },
|
||||
{ 0x0134, 0x665134 },
|
||||
{ 0x0138, 0x665138 },
|
||||
{ 0x013c, 0x66513c },
|
||||
{ 0x0140, 0x665140 },
|
||||
{ 0x0144, 0x665144 },
|
||||
{ 0x0148, 0x665148 },
|
||||
{ 0x014c, 0x66514c },
|
||||
{ 0x0150, 0x665150 },
|
||||
{ 0x0154, 0x665154 },
|
||||
{ 0x0158, 0x665158 },
|
||||
{ 0x015c, 0x66515c },
|
||||
{ 0x0160, 0x665160 },
|
||||
{ 0x0164, 0x665164 },
|
||||
{ 0x0168, 0x665168 },
|
||||
{ 0x016c, 0x66516c },
|
||||
{ 0x0400, 0x665400 },
|
||||
{ 0x0404, 0x665404 },
|
||||
{ 0x0408, 0x665408 },
|
||||
{ 0x040c, 0x66540c },
|
||||
{ 0x0410, 0x665410 },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
const struct nv50_disp_mthd_chan
|
||||
nve0_disp_ovly_mthd_chan = {
|
||||
.name = "Overlay",
|
||||
.addr = 0x001000,
|
||||
.data = {
|
||||
{ "Global", 1, &nve0_disp_ovly_mthd_base },
|
||||
{}
|
||||
}
|
||||
};
|
||||
|
||||
/*******************************************************************************
|
||||
* Base display object
|
||||
******************************************************************************/
|
||||
@ -94,4 +259,8 @@ nve0_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nve0_disp_mast_mthd_chan,
|
||||
.mthd.base = &nvd0_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nve0_disp_ovly_mthd_chan,
|
||||
.mthd.prev = -0x020000,
|
||||
}.base.base;
|
||||
|
||||
@ -94,4 +94,8 @@ nvf0_disp_oclass = &(struct nv50_disp_impl) {
|
||||
.init = _nouveau_disp_init,
|
||||
.fini = _nouveau_disp_fini,
|
||||
},
|
||||
.mthd.core = &nve0_disp_mast_mthd_chan,
|
||||
.mthd.base = &nvd0_disp_sync_mthd_chan,
|
||||
.mthd.ovly = &nve0_disp_ovly_mthd_chan,
|
||||
.mthd.prev = -0x020000,
|
||||
}.base.base;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user