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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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igc: Remove mac_table from igc_adapter
In igc_adapter we keep a sort of shadow copy of RAL and RAH registers. There is not much benefit in keeping it, at the cost of maintainability, since adding/removing MAC address filters is not hot path, and we already keep filters information in adapter->nfc_filter_list for cleanup and restoration purposes. So in order to simplify the MAC address filtering code and prepare it for source address support, this patch removes the mac_table from igc_adapter. Signed-off-by: Andre Guedes <andre.guedes@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -190,8 +190,6 @@ struct igc_adapter {
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/* lock for RX network flow classification filter */
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spinlock_t nfc_lock;
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struct igc_mac_addr *mac_table;
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u8 rss_indir_tbl[IGC_RETA_SIZE];
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unsigned long link_check_timeout;
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@ -470,15 +468,6 @@ struct igc_nfc_filter {
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u16 action;
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};
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struct igc_mac_addr {
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u8 addr[ETH_ALEN];
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s8 queue;
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u8 state; /* bitmask */
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};
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#define IGC_MAC_STATE_DEFAULT 0x1
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#define IGC_MAC_STATE_IN_USE 0x2
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#define IGC_MAX_RXNFC_FILTERS 16
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/* igc_desc_unused - calculate if we have unused descriptors */
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@ -62,6 +62,7 @@
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* (RAR[15]) for our directed address used by controllers with
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* manageability enabled, allowing us room for 15 multicast addresses.
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*/
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#define IGC_RAH_RAH_MASK 0x0000FFFF
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#define IGC_RAH_QSEL_MASK 0x000C0000
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#define IGC_RAH_QSEL_SHIFT 18
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#define IGC_RAH_QSEL_ENABLE BIT(28)
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@ -820,17 +820,12 @@ static void igc_clear_mac_filter_hw(struct igc_adapter *adapter, int index)
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/* Set default MAC address for the PF in the first RAR entry */
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static void igc_set_default_mac_filter(struct igc_adapter *adapter)
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{
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struct igc_mac_addr *mac_table = &adapter->mac_table[0];
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struct net_device *dev = adapter->netdev;
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u8 *addr = adapter->hw.mac.addr;
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netdev_dbg(dev, "Set default MAC address filter: address %pM", addr);
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ether_addr_copy(mac_table->addr, addr);
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mac_table->state = IGC_MAC_STATE_DEFAULT | IGC_MAC_STATE_IN_USE;
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mac_table->queue = -1;
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igc_set_mac_filter_hw(adapter, 0, addr, mac_table->queue);
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igc_set_mac_filter_hw(adapter, 0, addr, -1);
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}
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/**
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@ -2186,16 +2181,21 @@ static void igc_nfc_filter_restore(struct igc_adapter *adapter)
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static int igc_find_mac_filter(struct igc_adapter *adapter, const u8 *addr)
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{
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int max_entries = adapter->hw.mac.rar_entry_count;
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struct igc_mac_addr *entry;
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struct igc_hw *hw = &adapter->hw;
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int max_entries = hw->mac.rar_entry_count;
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u32 ral, rah;
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int i;
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for (i = 0; i < max_entries; i++) {
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entry = &adapter->mac_table[i];
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ral = rd32(IGC_RAL(i));
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rah = rd32(IGC_RAH(i));
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if (!(entry->state & IGC_MAC_STATE_IN_USE))
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if (!(rah & IGC_RAH_AV))
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continue;
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if (!ether_addr_equal(addr, entry->addr))
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if ((rah & IGC_RAH_RAH_MASK) !=
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le16_to_cpup((__le16 *)(addr + 4)))
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continue;
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if (ral != le32_to_cpup((__le32 *)(addr)))
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continue;
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return i;
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@ -2206,14 +2206,15 @@ static int igc_find_mac_filter(struct igc_adapter *adapter, const u8 *addr)
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static int igc_get_avail_mac_filter_slot(struct igc_adapter *adapter)
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{
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int max_entries = adapter->hw.mac.rar_entry_count;
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struct igc_mac_addr *entry;
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struct igc_hw *hw = &adapter->hw;
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int max_entries = hw->mac.rar_entry_count;
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u32 rah;
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int i;
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for (i = 0; i < max_entries; i++) {
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entry = &adapter->mac_table[i];
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rah = rd32(IGC_RAH(i));
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if (!(entry->state & IGC_MAC_STATE_IN_USE))
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if (!(rah & IGC_RAH_AV))
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return i;
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}
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@ -2241,7 +2242,7 @@ int igc_add_mac_filter(struct igc_adapter *adapter, const u8 *addr,
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index = igc_find_mac_filter(adapter, addr);
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if (index >= 0)
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goto update_queue_assignment;
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goto update_filter;
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index = igc_get_avail_mac_filter_slot(adapter);
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if (index < 0)
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@ -2250,11 +2251,7 @@ int igc_add_mac_filter(struct igc_adapter *adapter, const u8 *addr,
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netdev_dbg(dev, "Add MAC address filter: index %d address %pM queue %d",
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index, addr, queue);
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ether_addr_copy(adapter->mac_table[index].addr, addr);
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adapter->mac_table[index].state |= IGC_MAC_STATE_IN_USE;
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update_queue_assignment:
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adapter->mac_table[index].queue = queue;
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update_filter:
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igc_set_mac_filter_hw(adapter, index, addr, queue);
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return 0;
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}
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@ -2269,7 +2266,6 @@ int igc_add_mac_filter(struct igc_adapter *adapter, const u8 *addr,
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int igc_del_mac_filter(struct igc_adapter *adapter, const u8 *addr)
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{
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struct net_device *dev = adapter->netdev;
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struct igc_mac_addr *entry;
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int index;
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if (!is_valid_ether_addr(addr))
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@ -2279,24 +2275,18 @@ int igc_del_mac_filter(struct igc_adapter *adapter, const u8 *addr)
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if (index < 0)
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return -ENOENT;
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entry = &adapter->mac_table[index];
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if (entry->state & IGC_MAC_STATE_DEFAULT) {
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if (index == 0) {
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/* If this is the default filter, we don't actually delete it.
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* We just reset to its default value i.e. disable queue
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* assignment.
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*/
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netdev_dbg(dev, "Disable default MAC filter queue assignment");
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entry->queue = -1;
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igc_set_mac_filter_hw(adapter, 0, addr, entry->queue);
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igc_set_mac_filter_hw(adapter, 0, addr, -1);
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} else {
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netdev_dbg(dev, "Delete MAC address filter: index %d address %pM",
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index, addr);
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entry->state = 0;
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entry->queue = -1;
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memset(entry->addr, 0, ETH_ALEN);
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igc_clear_mac_filter_hw(adapter, index);
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}
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@ -3404,8 +3394,6 @@ static int igc_sw_init(struct igc_adapter *adapter)
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struct pci_dev *pdev = adapter->pdev;
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struct igc_hw *hw = &adapter->hw;
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int size = sizeof(struct igc_mac_addr) * hw->mac.rar_entry_count;
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pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
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/* set default ring sizes */
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@ -3429,10 +3417,6 @@ static int igc_sw_init(struct igc_adapter *adapter)
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/* Assume MSI-X interrupts, will be checked during IRQ allocation */
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adapter->flags |= IGC_FLAG_HAS_MSIX;
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adapter->mac_table = kzalloc(size, GFP_ATOMIC);
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if (!adapter->mac_table)
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return -ENOMEM;
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igc_init_queue_configuration(adapter);
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/* This call may decrease the number of queues */
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@ -5135,7 +5119,6 @@ static void igc_remove(struct pci_dev *pdev)
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pci_iounmap(pdev, adapter->io_addr);
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pci_release_mem_regions(pdev);
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kfree(adapter->mac_table);
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free_netdev(netdev);
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pci_disable_pcie_error_reporting(pdev);
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