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bcm63xx_enet: do not write to random DMA channel on BCM6345

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The DMA controller regs actually point to DMA channel 0, so the write to
ENETDMA_CFG_REG will actually modify a random DMA channel.

Since DMA controller registers do not exist on BCM6345, guard the write
with the usual check for dma_has_sram.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jonas Gorski 2017-10-01 13:02:16 +02:00 committed by David S. Miller
parent 9c86b846ce
commit d6213c1f2a
1 changed files with 2 additions and 1 deletions
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drivers/net/ethernet/broadcom/bcm63xx_enet.c
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@ -1062,6 +1062,7 @@ static int bcm_enet_open(struct net_device *dev)
val = enet_readl(priv, ENET_CTL_REG); val = enet_readl(priv, ENET_CTL_REG);
val |= ENET_CTL_ENABLE_MASK; val |= ENET_CTL_ENABLE_MASK;
enet_writel(priv, val, ENET_CTL_REG); enet_writel(priv, val, ENET_CTL_REG);
if (priv->dma_has_sram)
enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
enet_dmac_writel(priv, priv->dma_chan_en_mask, enet_dmac_writel(priv, priv->dma_chan_en_mask,
ENETDMAC_CHANCFG, priv->rx_chan); ENETDMAC_CHANCFG, priv->rx_chan);