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drm/amd/display: remove dummy is_blanked() to optimise boot time
is_blanked() hook is a dummy one for underlay pipe, hence when called, it loops for ~300ms at boot. This patch removes this dummy call and adds missing checks. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -230,6 +230,9 @@ bool hwss_wait_for_blank_complete(
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{
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int counter;
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/* Not applicable if the pipe is not primary, save 300ms of boot time */
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if (!tg->funcs->is_blanked)
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return true;
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for (counter = 0; counter < 100; counter++) {
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if (tg->funcs->is_blanked(tg))
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break;
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@ -53,7 +53,8 @@ void dce_pipe_control_lock(struct dc *dc,
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struct dce_hwseq *hws = dc->hwseq;
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/* Not lock pipe when blank */
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if (lock && pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg))
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if (lock && pipe->stream_res.tg->funcs->is_blanked &&
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pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg))
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return;
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val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst],
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@ -648,12 +648,6 @@ static void dce110_timing_generator_v_disable_vga(
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return;
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}
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static bool dce110_tg_v_is_blanked(struct timing_generator *tg)
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{
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/* Signal comes from the primary pipe, underlay is never blanked. */
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return false;
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}
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/** ********************************************************************************************
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*
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* DCE11 Timing Generator Constructor / Destructor
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@ -670,7 +664,6 @@ static const struct timing_generator_funcs dce110_tg_v_funcs = {
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.set_early_control = dce110_timing_generator_v_set_early_control,
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.wait_for_state = dce110_timing_generator_v_wait_for_state,
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.set_blank = dce110_timing_generator_v_set_blank,
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.is_blanked = dce110_tg_v_is_blanked,
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.set_colors = dce110_timing_generator_v_set_colors,
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.set_overscan_blank_color =
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dce110_timing_generator_v_set_overscan_color_black,
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