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drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2

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Clean up the TRANS_DDI_FUNC_CTL2 programming/readout by
using REG_FIELD_PREP() & co.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200313164831.5980-6-ville.syrjala@linux.intel.com
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
This commit is contained in:
Ville Syrjälä 2020-03-13 18:48:23 +02:00
parent 02d8ea47db
commit d4d7d9ca57
2 changed files with 6 additions and 10 deletions
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6
drivers/gpu/drm/i915/display/intel_ddi.c
View File

@ -1575,9 +1575,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
master_select = master_transcoder + 1;
ctl2 |= PORT_SYNC_MODE_ENABLE |
(PORT_SYNC_MODE_MASTER_SELECT(master_select) &
PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
PORT_SYNC_MODE_MASTER_SELECT(master_select);
}
intel_de_write(dev_priv,
@ -3871,7 +3869,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
return INVALID_TRANSCODER;
master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
if (master_select == 0)
return TRANSCODER_EDP;

10
drivers/gpu/drm/i915/i915_reg.h
View File

@ -9728,12 +9728,10 @@ enum skl_power_gate {
#define _TRANS_DDI_FUNC_CTL2_EDP 0x6f404
#define _TRANS_DDI_FUNC_CTL2_DSI0 0x6b404
#define _TRANS_DDI_FUNC_CTL2_DSI1 0x6bc04
#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \
_TRANS_DDI_FUNC_CTL2_A)
#define PORT_SYNC_MODE_ENABLE (1 << 4)
#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0)
#define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0)
#define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0
#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL2_A)
#define PORT_SYNC_MODE_ENABLE REG_BIT(4)
#define PORT_SYNC_MODE_MASTER_SELECT_MASK REG_GENMASK(2, 0)
#define PORT_SYNC_MODE_MASTER_SELECT(x) REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
/* DisplayPort Transport Control */
#define _DP_TP_CTL_A 0x64040