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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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NVMe: Schedule reset for failed controllers
Schedules a controller reset when it indicates it has a failed status. If the device does not become ready after a reset, the pci device will be scheduled for removal. Signed-off-by: Keith Busch <keith.busch@intel.com> [fixed checkpatch issue] Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com>
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@ -60,6 +60,8 @@ static LIST_HEAD(dev_list);
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static struct task_struct *nvme_thread;
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static struct workqueue_struct *nvme_workq;
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static void nvme_reset_failed_dev(struct work_struct *ws);
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/*
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* An NVM Express queue. Each device has at least two (one for admin
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* commands and one for I/O commands).
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@ -1612,13 +1614,25 @@ static void nvme_resubmit_bios(struct nvme_queue *nvmeq)
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static int nvme_kthread(void *data)
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{
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struct nvme_dev *dev;
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struct nvme_dev *dev, *next;
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while (!kthread_should_stop()) {
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set_current_state(TASK_INTERRUPTIBLE);
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spin_lock(&dev_list_lock);
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list_for_each_entry(dev, &dev_list, node) {
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list_for_each_entry_safe(dev, next, &dev_list, node) {
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int i;
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if (readl(&dev->bar->csts) & NVME_CSTS_CFS &&
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dev->initialized) {
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if (work_busy(&dev->reset_work))
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continue;
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list_del_init(&dev->node);
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dev_warn(&dev->pci_dev->dev,
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"Failed status, reset controller\n");
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INIT_WORK(&dev->reset_work,
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nvme_reset_failed_dev);
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queue_work(nvme_workq, &dev->reset_work);
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continue;
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}
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for (i = 0; i < dev->queue_count; i++) {
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struct nvme_queue *nvmeq = dev->queues[i];
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if (!nvmeq)
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@ -2006,6 +2020,7 @@ static void nvme_dev_shutdown(struct nvme_dev *dev)
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{
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int i;
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dev->initialized = 0;
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for (i = dev->queue_count - 1; i >= 0; i--)
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nvme_disable_queue(dev, i);
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@ -2196,6 +2211,7 @@ static int nvme_dev_resume(struct nvme_dev *dev)
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queue_work(nvme_workq, &dev->reset_work);
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spin_unlock(&dev_list_lock);
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}
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dev->initialized = 1;
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return 0;
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}
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@ -2269,6 +2285,7 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (result)
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goto remove;
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dev->initialized = 1;
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kref_init(&dev->kref);
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return 0;
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@ -95,6 +95,7 @@ struct nvme_dev {
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u32 max_hw_sectors;
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u32 stripe_size;
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u16 oncs;
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u8 initialized;
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};
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/*
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