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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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pch_gbe: reprogram multicast address register on reset
The reset logic after a Rx FIFO overrun will clear the programmed
multicast addresses. This patch fixes the issue by reprogramming the
registers after the reset.
The commit eefc48b
("pch_gbe: reprogram multicast address register on
reset") tried to fix this problem, but it introduces unnecessary
codes. In fact, all multicast addresses have been saved in netdev->mc,
So we can call pch_gbe_set_multi() directly after reset_hw and
reset_rx.
This commit kills 50+ line codes
Cc: Richard Cochran <richardcochran@gmail.com>
Cc: Takahiro Shimizu <tshimizu818@gmail.com>
Signed-off-by: RongQing.Li <roy.qing.li@gmail.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
1d0c0b328a
commit
d344c4f310
@ -120,6 +120,7 @@ static unsigned int copybreak __read_mostly = PCH_GBE_COPYBREAK_DEFAULT;
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static int pch_gbe_mdio_read(struct net_device *netdev, int addr, int reg);
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static void pch_gbe_mdio_write(struct net_device *netdev, int addr, int reg,
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int data);
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static void pch_gbe_set_multi(struct net_device *netdev);
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#ifdef CONFIG_PCH_PTP
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static struct sock_filter ptp_filter[] = {
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@ -390,59 +391,14 @@ static void pch_gbe_mac_mar_set(struct pch_gbe_hw *hw, u8 * addr, u32 index)
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pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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}
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/**
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* pch_gbe_mac_save_mac_addr_regs - Save MAC addresse registers
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* @hw: Pointer to the HW structure
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* @addr: Pointer to the MAC address
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* @index: MAC address array register
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*/
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static void
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pch_gbe_mac_save_mac_addr_regs(struct pch_gbe_hw *hw,
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struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
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{
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mac_adr->high = ioread32(&hw->reg->mac_adr[index].high);
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mac_adr->low = ioread32(&hw->reg->mac_adr[index].low);
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}
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/**
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* pch_gbe_mac_store_mac_addr_regs - Store MAC addresse registers
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* @hw: Pointer to the HW structure
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* @addr: Pointer to the MAC address
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* @index: MAC address array register
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*/
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static void
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pch_gbe_mac_store_mac_addr_regs(struct pch_gbe_hw *hw,
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struct pch_gbe_regs_mac_adr *mac_adr, u32 index)
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{
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u32 adrmask;
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adrmask = ioread32(&hw->reg->ADDR_MASK);
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iowrite32((adrmask | (0x0001 << index)), &hw->reg->ADDR_MASK);
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/* wait busy */
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pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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/* Set the MAC address to the MAC address xA/xB register */
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iowrite32(mac_adr->high, &hw->reg->mac_adr[index].high);
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iowrite32(mac_adr->low, &hw->reg->mac_adr[index].low);
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iowrite32((adrmask & ~(0x0001 << index)), &hw->reg->ADDR_MASK);
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/* wait busy */
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pch_gbe_wait_clr_bit(&hw->reg->ADDR_MASK, PCH_GBE_BUSY);
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}
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#define MAC_ADDR_LIST_NUM 16
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/**
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* pch_gbe_mac_reset_hw - Reset hardware
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* @hw: Pointer to the HW structure
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*/
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static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
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{
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struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
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int i;
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/* Read the MAC address. and store to the private data */
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pch_gbe_mac_read_mac_addr(hw);
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/* Read other MAC addresses */
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for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
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iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
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#ifdef PCH_GBE_MAC_IFOP_RGMII
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iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
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@ -450,26 +406,17 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw)
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pch_gbe_wait_clr_bit(&hw->reg->RESET, PCH_GBE_ALL_RST);
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/* Setup the receive addresses */
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pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
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for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
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return;
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}
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static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw)
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{
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struct pch_gbe_regs_mac_adr mac_addr_list[MAC_ADDR_LIST_NUM];
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int i;
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/* Read the MAC addresses. and store to the private data */
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pch_gbe_mac_read_mac_addr(hw);
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for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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pch_gbe_mac_save_mac_addr_regs(hw, &mac_addr_list[i], i);
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iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET);
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pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST);
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/* Setup the MAC addresses */
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pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
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for (i = 1; i < MAC_ADDR_LIST_NUM; i++)
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pch_gbe_mac_store_mac_addr_regs(hw, &mac_addr_list[i], i);
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return;
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}
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@ -836,6 +783,8 @@ void pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter)
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void pch_gbe_reset(struct pch_gbe_adapter *adapter)
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{
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pch_gbe_mac_reset_hw(&adapter->hw);
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/* reprogram multicast address register after reset */
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pch_gbe_set_multi(adapter->netdev);
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/* Setup the receive address. */
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pch_gbe_mac_init_rx_addrs(&adapter->hw, PCH_GBE_MAR_ENTRIES);
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if (pch_gbe_hal_init_hw(&adapter->hw))
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@ -1398,6 +1347,8 @@ static void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter)
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/* Stop Receive */
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pch_gbe_mac_reset_rx(hw);
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}
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/* reprogram multicast address register after reset */
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pch_gbe_set_multi(adapter->netdev);
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}
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static void pch_gbe_start_receive(struct pch_gbe_hw *hw)
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@ -1980,7 +1931,6 @@ static int pch_gbe_request_irq(struct pch_gbe_adapter *adapter)
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}
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static void pch_gbe_set_multi(struct net_device *netdev);
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/**
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* pch_gbe_up - Up GbE network device
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* @adapter: Board private structure
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