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ARM: gemini: Setup timer3 as free running timer
In the original driver it is missed to setup a free running driver. This timer is needed for the scheduler. So setup it. Signed-off-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -15,6 +15,7 @@
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#include <asm/mach/time.h>
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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#include <linux/sched_clock.h>
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/*
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* Register definitions for the timers
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@ -62,6 +63,11 @@
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static unsigned int tick_rate;
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static u64 notrace gemini_read_sched_clock(void)
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{
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return readl(TIMER_COUNT(TIMER3_BASE));
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}
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static int gemini_timer_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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{
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@ -206,8 +212,21 @@ void __init gemini_timer_init(void)
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writel(TIMER_DEFAULT_FLAGS, TIMER_CR);
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/*
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* Setup clockevent timer (interrupt-driven.)
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* Setup free-running clocksource timer (interrupts
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* disabled.)
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*/
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writel(0, TIMER_COUNT(TIMER3_BASE));
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writel(0, TIMER_LOAD(TIMER3_BASE));
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writel(0, TIMER_MATCH1(TIMER3_BASE));
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writel(0, TIMER_MATCH2(TIMER3_BASE));
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clocksource_mmio_init(TIMER_COUNT(TIMER3_BASE),
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"gemini_clocksource", tick_rate,
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300, 32, clocksource_mmio_readl_up);
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sched_clock_register(gemini_read_sched_clock, 32, tick_rate);
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/*
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* Setup clockevent timer (interrupt-driven.)
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*/
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writel(0, TIMER_COUNT(TIMER1_BASE));
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writel(0, TIMER_LOAD(TIMER1_BASE));
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writel(0, TIMER_MATCH1(TIMER1_BASE));
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