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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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drm/i915: Clean up ilk/icl pipe/output CSC programming
We have far too much messy duplicated code in the pipe/output CSC programming. Simply provide two functions (ilk_update_pipe_csc() and icl_update_output_csc()) to program the relevant CSC registers. The desired offsets and coefficients are passed in as parameters. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-5-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
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@ -40,23 +40,6 @@
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#define CTM_COEFF_ABS(coeff) ((coeff) & (CTM_COEFF_SIGN - 1))
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#define LEGACY_LUT_LENGTH 256
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/* Post offset values for RGB->YCBCR conversion */
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#define POSTOFF_RGB_TO_YUV_HI 0x800
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#define POSTOFF_RGB_TO_YUV_ME 0x100
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#define POSTOFF_RGB_TO_YUV_LO 0x800
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/*
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* These values are direct register values specified in the Bspec,
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* for RGB->YUV conversion matrix (colorspace BT709)
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*/
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#define CSC_RGB_TO_YUV_RU_GU 0x2ba809d8
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#define CSC_RGB_TO_YUV_BU 0x37e80000
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#define CSC_RGB_TO_YUV_RY_GY 0x1e089cc0
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#define CSC_RGB_TO_YUV_BY 0xb5280000
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#define CSC_RGB_TO_YUV_RV_GV 0xbce89ad8
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#define CSC_RGB_TO_YUV_BV 0x1e080000
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/*
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* Extract the CSC coefficient from a CTM coefficient (in U32.32 fixed point
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* format). This macro takes the coefficient we want transformed and the
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@ -74,6 +57,31 @@
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#define ILK_CSC_COEFF_1_0 \
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((7 << 12) | ILK_CSC_COEFF_FP(CTM_COEFF_1_0, 8))
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#define ILK_CSC_POSTOFF_LIMITED_RANGE (16 * (1 << 12) / 255)
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static const u16 ilk_csc_off_zero[3] = {};
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static const u16 ilk_csc_postoff_limited_range[3] = {
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ILK_CSC_POSTOFF_LIMITED_RANGE,
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ILK_CSC_POSTOFF_LIMITED_RANGE,
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ILK_CSC_POSTOFF_LIMITED_RANGE,
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};
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/*
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* These values are direct register values specified in the Bspec,
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* for RGB->YUV conversion matrix (colorspace BT709)
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*/
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static const u16 ilk_csc_coeff_rgb_to_ycbcr[9] = {
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0x1e08, 0x9cc0, 0xb528,
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0x2ba8, 0x09d8, 0x37e8,
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0xbce8, 0x9ad8, 0x1e08,
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};
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/* Post offset values for RGB->YCBCR conversion */
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static const u16 ilk_csc_postoff_rgb_to_ycbcr[3] = {
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0x0800, 0x0100, 0x0800,
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};
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static bool lut_is_legacy(const struct drm_property_blob *lut)
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{
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return drm_color_lut_size(lut) == LEGACY_LUT_LENGTH;
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@ -113,54 +121,60 @@ static u64 *ctm_mult_by_limited(u64 *result, const u64 *input)
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return result;
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}
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static void ilk_load_ycbcr_conversion_matrix(struct intel_crtc *crtc)
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static void ilk_update_pipe_csc(struct intel_crtc *crtc,
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const u16 preoff[3],
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const u16 coeff[9],
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const u16 postoff[3])
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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if (INTEL_GEN(dev_priv) < 11) {
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I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), preoff[0]);
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I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), preoff[1]);
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I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), preoff[2]);
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I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), CSC_RGB_TO_YUV_RU_GU);
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I915_WRITE(PIPE_CSC_COEFF_BU(pipe), CSC_RGB_TO_YUV_BU);
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I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), coeff[0] << 16 | coeff[1]);
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I915_WRITE(PIPE_CSC_COEFF_BY(pipe), coeff[2] << 16);
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I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), CSC_RGB_TO_YUV_RY_GY);
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I915_WRITE(PIPE_CSC_COEFF_BY(pipe), CSC_RGB_TO_YUV_BY);
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I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), coeff[3] << 16 | coeff[4]);
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I915_WRITE(PIPE_CSC_COEFF_BU(pipe), coeff[5] << 16);
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I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), CSC_RGB_TO_YUV_RV_GV);
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I915_WRITE(PIPE_CSC_COEFF_BV(pipe), CSC_RGB_TO_YUV_BV);
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I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), coeff[6] << 16 | coeff[7]);
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I915_WRITE(PIPE_CSC_COEFF_BV(pipe), coeff[8] << 16);
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I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), POSTOFF_RGB_TO_YUV_HI);
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I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), POSTOFF_RGB_TO_YUV_ME);
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I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), POSTOFF_RGB_TO_YUV_LO);
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} else {
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_HI(pipe), 0);
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_ME(pipe), 0);
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_LO(pipe), 0);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe),
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CSC_RGB_TO_YUV_RU_GU);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BU(pipe), CSC_RGB_TO_YUV_BU);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe),
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CSC_RGB_TO_YUV_RY_GY);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BY(pipe), CSC_RGB_TO_YUV_BY);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe),
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CSC_RGB_TO_YUV_RV_GV);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BV(pipe), CSC_RGB_TO_YUV_BV);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_HI(pipe),
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POSTOFF_RGB_TO_YUV_HI);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_ME(pipe),
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POSTOFF_RGB_TO_YUV_ME);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_LO(pipe),
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POSTOFF_RGB_TO_YUV_LO);
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if (INTEL_GEN(dev_priv) >= 7) {
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I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff[0]);
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I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff[1]);
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I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff[2]);
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}
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}
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static void icl_update_output_csc(struct intel_crtc *crtc,
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const u16 preoff[3],
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const u16 coeff[9],
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const u16 postoff[3])
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{
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struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
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enum pipe pipe = crtc->pipe;
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_HI(pipe), preoff[0]);
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_ME(pipe), preoff[1]);
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I915_WRITE(PIPE_CSC_OUTPUT_PREOFF_LO(pipe), preoff[2]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe), coeff[0] << 16 | coeff[1]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BY(pipe), coeff[2]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe), coeff[3] << 16 | coeff[4]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BU(pipe), coeff[5]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe), coeff[6] << 16 | coeff[7]);
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I915_WRITE(PIPE_CSC_OUTPUT_COEFF_BV(pipe), coeff[8]);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_HI(pipe), postoff[0]);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_ME(pipe), postoff[1]);
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I915_WRITE(PIPE_CSC_OUTPUT_POSTOFF_LO(pipe), postoff[2]);
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}
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static bool ilk_csc_limited_range(const struct intel_crtc_state *crtc_state)
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{
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struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
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@ -185,7 +199,15 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
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crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
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ilk_load_ycbcr_conversion_matrix(crtc);
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if (INTEL_GEN(dev_priv) >= 11)
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icl_update_output_csc(crtc, ilk_csc_off_zero,
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ilk_csc_coeff_rgb_to_ycbcr,
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ilk_csc_postoff_rgb_to_ycbcr);
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else
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ilk_update_pipe_csc(crtc, ilk_csc_off_zero,
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ilk_csc_coeff_rgb_to_ycbcr,
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ilk_csc_postoff_rgb_to_ycbcr);
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I915_WRITE(PIPE_CSC_MODE(pipe), crtc_state->csc_mode);
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/*
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* On pre GEN11 output CSC is not there, so with 1 pipe CSC
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@ -258,38 +280,12 @@ static void ilk_load_csc_matrix(const struct intel_crtc_state *crtc_state)
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}
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}
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I915_WRITE(PIPE_CSC_COEFF_RY_GY(pipe), coeffs[0] << 16 | coeffs[1]);
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I915_WRITE(PIPE_CSC_COEFF_BY(pipe), coeffs[2] << 16);
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ilk_update_pipe_csc(crtc, ilk_csc_off_zero, coeffs,
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limited_color_range ?
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ilk_csc_postoff_limited_range :
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ilk_csc_off_zero);
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I915_WRITE(PIPE_CSC_COEFF_RU_GU(pipe), coeffs[3] << 16 | coeffs[4]);
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I915_WRITE(PIPE_CSC_COEFF_BU(pipe), coeffs[5] << 16);
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I915_WRITE(PIPE_CSC_COEFF_RV_GV(pipe), coeffs[6] << 16 | coeffs[7]);
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I915_WRITE(PIPE_CSC_COEFF_BV(pipe), coeffs[8] << 16);
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I915_WRITE(PIPE_CSC_PREOFF_HI(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_ME(pipe), 0);
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I915_WRITE(PIPE_CSC_PREOFF_LO(pipe), 0);
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if (INTEL_GEN(dev_priv) > 6) {
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u16 postoff = 0;
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if (limited_color_range)
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postoff = (16 * (1 << 12) / 255) & 0x1fff;
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I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
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I915_WRITE(PIPE_CSC_POSTOFF_ME(pipe), postoff);
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I915_WRITE(PIPE_CSC_POSTOFF_LO(pipe), postoff);
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I915_WRITE(PIPE_CSC_MODE(pipe), crtc_state->csc_mode);
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} else {
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u32 mode = CSC_MODE_YUV_TO_RGB;
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if (limited_color_range)
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mode |= CSC_BLACK_SCREEN_OFFSET;
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I915_WRITE(PIPE_CSC_MODE(pipe), mode);
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}
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I915_WRITE(PIPE_CSC_MODE(pipe), crtc_state->csc_mode);
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}
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/*
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