mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 11:15:07 +07:00
drm/amdgpu: enable sw clock gating for vcn
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
fb4d56fa37
commit
d2a33871b5
@ -501,7 +501,7 @@ static int vcn_v1_0_start(struct amdgpu_device *adev)
|
|||||||
vcn_v1_0_mc_resume(adev);
|
vcn_v1_0_mc_resume(adev);
|
||||||
|
|
||||||
/* disable clock gating */
|
/* disable clock gating */
|
||||||
vcn_v1_0_disable_clock_gating(adev, false);
|
vcn_v1_0_disable_clock_gating(adev, true);
|
||||||
|
|
||||||
/* disable interupt */
|
/* disable interupt */
|
||||||
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0,
|
WREG32_P(SOC15_REG_OFFSET(UVD, 0, mmUVD_MASTINT_EN), 0,
|
||||||
@ -682,7 +682,7 @@ static int vcn_v1_0_stop(struct amdgpu_device *adev)
|
|||||||
~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
|
~UVD_LMI_CTRL2__STALL_ARB_UMC_MASK);
|
||||||
|
|
||||||
/* enable clock gating */
|
/* enable clock gating */
|
||||||
vcn_v1_0_enable_clock_gating(adev, false);
|
vcn_v1_0_enable_clock_gating(adev, true);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user