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ARM: dts: DRA7: Add pcie1 dt node for EP mode

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Add pcie1 dt node in order for the controller to operate in
endpoint mode. However since none of the dra7 based boards have
slots configured to operate in endpoint mode, keep EP mode
disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Kishon Vijay Abraham I 2017-08-08 11:10:24 +05:30 committed by Tony Lindgren
parent 5e45286595
commit d23f3839fe
6 changed files with 51 additions and 3 deletions
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9
arch/arm/boot/dts/am571x-idk.dts
View File

@ -96,3 +96,12 @@ mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};

7
arch/arm/boot/dts/am572x-idk.dts
View File

@ -88,7 +88,12 @@ &sn65hvs882 {
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};
&pcie1 {
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};

7
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
View File

@ -570,7 +570,12 @@ hdmi_out: endpoint {
};
};
&pcie1 {
&pcie1_rc {
status = "ok";
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
};
&pcie1_ep {
gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
};

4
arch/arm/boot/dts/dra7-evm.dts
View File

@ -729,3 +729,7 @@ mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
};

23
arch/arm/boot/dts/dra7.dtsi
View File

@ -196,6 +196,7 @@ dra7_pmx_core: pinmux@1400 {
scm_conf1: scm_conf@1c04 {
compatible = "syscon";
reg = <0x1c04 0x0020>;
#syscon-cells = <2>;
};
scm_conf_pcie: scm_conf@1c24 {
@ -287,7 +288,11 @@ axi@0 {
#address-cells = <1>;
ranges = <0x51000000 0x51000000 0x3000
0x0 0x20000000 0x10000000>;
pcie1: pcie@51000000 {
/**
* To enable PCI endpoint mode, disable the pcie1_rc
* node and enable pcie1_ep mode.
*/
pcie1_rc: pcie@51000000 {
compatible = "ti,dra7-pcie";
reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
reg-names = "rc_dbics", "ti_conf", "config";
@ -309,12 +314,28 @@ pcie1: pcie@51000000 {
<0 0 0 2 &pcie1_intc 2>,
<0 0 0 3 &pcie1_intc 3>,
<0 0 0 4 &pcie1_intc 4>;
status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
};
};
pcie1_ep: pcie_ep@51000000 {
compatible = "ti,dra7-pcie-ep";
reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
interrupts = <0 232 0x4>;
num-lanes = <1>;
num-ib-windows = <4>;
num-ob-windows = <16>;
ti,hwmods = "pcie1";
phys = <&pcie1_phy>;
phy-names = "pcie-phy0";
ti,syscon-unaligned-access = <&scm_conf1 0x14 2>;
status = "disabled";
};
};
axi@1 {

4
arch/arm/boot/dts/dra72-evm-common.dtsi
View File

@ -563,3 +563,7 @@ mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
};