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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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mmc: sdhci: convert ADMA descriptors to a coherent allocation
Rather than using the streaming API, use the coherent allocator to provide this memory, thereby eliminating cache flushing of it each time we map and unmap it. This results in a 7.5% increase in transfer speed with a UHS-1 card operating in 3.3v mode at a clock of 49.5MHz. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Markus Pargmann <mpa@pengutronix.de> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
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@ -44,6 +44,8 @@
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#define MAX_TUNING_LOOP 40
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#define ADMA_SIZE ((128 * 2 + 1) * 4)
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static unsigned int debug_quirks = 0;
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static unsigned int debug_quirks2;
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@ -481,11 +483,6 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
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else
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direction = DMA_TO_DEVICE;
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/*
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* The ADMA descriptor table is mapped further down as we
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* need to fill it with data first.
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*/
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host->align_addr = dma_map_single(mmc_dev(host->mmc),
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host->align_buffer, 128 * 4, direction);
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if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
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@ -546,7 +543,7 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
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* If this triggers then we have a calculation bug
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* somewhere. :/
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*/
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WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
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WARN_ON((desc - host->adma_desc) > ADMA_SIZE);
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}
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if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) {
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@ -574,17 +571,8 @@ static int sdhci_adma_table_pre(struct sdhci_host *host,
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host->align_addr, 128 * 4, direction);
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}
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host->adma_addr = dma_map_single(mmc_dev(host->mmc),
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host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
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if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
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goto unmap_entries;
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BUG_ON(host->adma_addr & 0x3);
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return 0;
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unmap_entries:
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dma_unmap_sg(mmc_dev(host->mmc), data->sg,
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data->sg_len, direction);
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unmap_align:
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dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
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128 * 4, direction);
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@ -609,9 +597,6 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
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else
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direction = DMA_TO_DEVICE;
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dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
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(128 * 2 + 1) * 4, DMA_TO_DEVICE);
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dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
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128 * 4, direction);
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@ -2856,15 +2841,29 @@ int sdhci_add_host(struct sdhci_host *host)
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* (128) and potentially one alignment transfer for
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* each of those entries.
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*/
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host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
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host->adma_desc = dma_alloc_coherent(mmc_dev(host->mmc),
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ADMA_SIZE, &host->adma_addr,
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GFP_KERNEL);
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host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
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if (!host->adma_desc || !host->align_buffer) {
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kfree(host->adma_desc);
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dma_free_coherent(mmc_dev(host->mmc), ADMA_SIZE,
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host->adma_desc, host->adma_addr);
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kfree(host->align_buffer);
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pr_warning("%s: Unable to allocate ADMA "
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"buffers. Falling back to standard DMA.\n",
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mmc_hostname(mmc));
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host->flags &= ~SDHCI_USE_ADMA;
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host->adma_desc = NULL;
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host->align_buffer = NULL;
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} else if (host->adma_addr & 3) {
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pr_warning("%s: unable to allocate aligned ADMA descriptor\n",
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mmc_hostname(mmc));
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host->flags &= ~SDHCI_USE_ADMA;
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dma_free_coherent(mmc_dev(host->mmc), ADMA_SIZE,
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host->adma_desc, host->adma_addr);
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kfree(host->align_buffer);
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host->adma_desc = NULL;
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host->align_buffer = NULL;
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}
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}
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@ -3342,7 +3341,9 @@ void sdhci_remove_host(struct sdhci_host *host, int dead)
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regulator_put(host->vqmmc);
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}
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kfree(host->adma_desc);
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if (host->adma_desc)
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dma_free_coherent(mmc_dev(host->mmc), ADMA_SIZE,
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host->adma_desc, host->adma_addr);
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kfree(host->align_buffer);
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host->adma_desc = NULL;
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