mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 22:36:41 +07:00
xhci: trace debug messages related to driver initialization and unload
This patch defines a new trace event, which is called xhci_dbg_init and belongs to the event class xhci_log_msg, and adds tracepoints that trace the debug statements in the functions used to start and stop the xhci-hcd driver. Also, it removes an unnecessary cast of variable val to unsigned int in xhci_mem_init(), since val is already declared as unsigned int. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
This commit is contained in:
parent
aa50b29061
commit
d195fcffe4
@ -1545,7 +1545,8 @@ static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
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struct device *dev = xhci_to_hcd(xhci)->self.controller;
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int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
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xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Allocating %d scratchpad buffers", num_sp);
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if (!num_sp)
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return 0;
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@ -1702,11 +1703,11 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
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dma_free_coherent(&pdev->dev, size,
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xhci->erst.entries, xhci->erst.erst_dma_addr);
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xhci->erst.entries = NULL;
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xhci_dbg(xhci, "Freed ERST\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed ERST");
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if (xhci->event_ring)
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xhci_ring_free(xhci, xhci->event_ring);
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xhci->event_ring = NULL;
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xhci_dbg(xhci, "Freed event ring\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed event ring");
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if (xhci->lpm_command)
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xhci_free_command(xhci, xhci->lpm_command);
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@ -1714,7 +1715,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
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if (xhci->cmd_ring)
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xhci_ring_free(xhci, xhci->cmd_ring);
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xhci->cmd_ring = NULL;
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xhci_dbg(xhci, "Freed command ring\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed command ring");
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list_for_each_entry_safe(cur_cd, next_cd,
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&xhci->cancel_cmd_list, cancel_cmd_list) {
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list_del(&cur_cd->cancel_cmd_list);
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@ -1727,22 +1728,24 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
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if (xhci->segment_pool)
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dma_pool_destroy(xhci->segment_pool);
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xhci->segment_pool = NULL;
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xhci_dbg(xhci, "Freed segment pool\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed segment pool");
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if (xhci->device_pool)
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dma_pool_destroy(xhci->device_pool);
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xhci->device_pool = NULL;
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xhci_dbg(xhci, "Freed device context pool\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed device context pool");
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if (xhci->small_streams_pool)
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dma_pool_destroy(xhci->small_streams_pool);
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xhci->small_streams_pool = NULL;
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xhci_dbg(xhci, "Freed small stream array pool\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Freed small stream array pool");
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if (xhci->medium_streams_pool)
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dma_pool_destroy(xhci->medium_streams_pool);
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xhci->medium_streams_pool = NULL;
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xhci_dbg(xhci, "Freed medium stream array pool\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Freed medium stream array pool");
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if (xhci->dcbaa)
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dma_free_coherent(&pdev->dev, sizeof(*xhci->dcbaa),
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@ -1968,8 +1971,9 @@ static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
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* there might be more events to service.
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*/
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temp &= ~ERST_EHB;
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xhci_dbg(xhci, "// Write event ring dequeue pointer, "
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"preserving EHB bit\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Write event ring dequeue pointer, "
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"preserving EHB bit");
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xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
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&xhci->ir_set->erst_dequeue);
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}
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@ -1992,8 +1996,9 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
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temp = xhci_readl(xhci, addr + 2);
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port_offset = XHCI_EXT_PORT_OFF(temp);
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port_count = XHCI_EXT_PORT_COUNT(temp);
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xhci_dbg(xhci, "Ext Cap %p, port offset = %u, "
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"count = %u, revision = 0x%x\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Ext Cap %p, port offset = %u, "
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"count = %u, revision = 0x%x",
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addr, port_offset, port_count, major_revision);
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/* Port count includes the current port offset */
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if (port_offset == 0 || (port_offset + port_count - 1) > num_ports)
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@ -2007,15 +2012,18 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
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/* Check the host's USB2 LPM capability */
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if ((xhci->hci_version == 0x96) && (major_revision != 0x03) &&
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(temp & XHCI_L1C)) {
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xhci_dbg(xhci, "xHCI 0.96: support USB2 software lpm\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"xHCI 0.96: support USB2 software lpm");
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xhci->sw_lpm_support = 1;
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}
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if ((xhci->hci_version >= 0x100) && (major_revision != 0x03)) {
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xhci_dbg(xhci, "xHCI 1.0: support USB2 software lpm\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"xHCI 1.0: support USB2 software lpm");
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xhci->sw_lpm_support = 1;
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if (temp & XHCI_HLC) {
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xhci_dbg(xhci, "xHCI 1.0: support USB2 hardware lpm\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"xHCI 1.0: support USB2 hardware lpm");
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xhci->hw_lpm_support = 1;
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}
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}
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@ -2139,18 +2147,21 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
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xhci_warn(xhci, "No ports on the roothubs?\n");
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return -ENODEV;
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}
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xhci_dbg(xhci, "Found %u USB 2.0 ports and %u USB 3.0 ports.\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Found %u USB 2.0 ports and %u USB 3.0 ports.",
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xhci->num_usb2_ports, xhci->num_usb3_ports);
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/* Place limits on the number of roothub ports so that the hub
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* descriptors aren't longer than the USB core will allocate.
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*/
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if (xhci->num_usb3_ports > 15) {
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xhci_dbg(xhci, "Limiting USB 3.0 roothub ports to 15.\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Limiting USB 3.0 roothub ports to 15.");
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xhci->num_usb3_ports = 15;
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}
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if (xhci->num_usb2_ports > USB_MAXCHILDREN) {
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xhci_dbg(xhci, "Limiting USB 2.0 roothub ports to %u.\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Limiting USB 2.0 roothub ports to %u.",
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USB_MAXCHILDREN);
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xhci->num_usb2_ports = USB_MAXCHILDREN;
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}
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@ -2175,8 +2186,9 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
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xhci->usb2_ports[port_index] =
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&xhci->op_regs->port_status_base +
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NUM_PORT_REGS*i;
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xhci_dbg(xhci, "USB 2.0 port at index %u, "
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"addr = %p\n", i,
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"USB 2.0 port at index %u, "
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"addr = %p", i,
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xhci->usb2_ports[port_index]);
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port_index++;
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if (port_index == xhci->num_usb2_ports)
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@ -2195,8 +2207,9 @@ static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
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xhci->usb3_ports[port_index] =
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&xhci->op_regs->port_status_base +
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NUM_PORT_REGS*i;
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xhci_dbg(xhci, "USB 3.0 port at index %u, "
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"addr = %p\n", i,
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"USB 3.0 port at index %u, "
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"addr = %p", i,
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xhci->usb3_ports[port_index]);
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port_index++;
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if (port_index == xhci->num_usb3_ports)
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@ -2220,32 +2233,35 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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INIT_LIST_HEAD(&xhci->cancel_cmd_list);
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page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
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xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Supported page size register = 0x%x", page_size);
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for (i = 0; i < 16; i++) {
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if ((0x1 & page_size) != 0)
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break;
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page_size = page_size >> 1;
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}
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if (i < 16)
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xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Supported page size of %iK", (1 << (i+12)) / 1024);
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else
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xhci_warn(xhci, "WARN: no supported page size\n");
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/* Use 4K pages, since that's common and the minimum the HC supports */
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xhci->page_shift = 12;
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xhci->page_size = 1 << xhci->page_shift;
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xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"HCD page size set to %iK", xhci->page_size / 1024);
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/*
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* Program the Number of Device Slots Enabled field in the CONFIG
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* register with the max value of slots the HC can handle.
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*/
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val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));
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xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n",
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(unsigned int) val);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// xHC can handle at most %d device slots.", val);
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val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);
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val |= (val2 & ~HCS_SLOTS_MASK);
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xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n",
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(unsigned int) val);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Setting Max device slots reg = 0x%x.", val);
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xhci_writel(xhci, val, &xhci->op_regs->config_reg);
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/*
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@ -2258,7 +2274,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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goto fail;
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memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
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xhci->dcbaa->dma = dma;
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xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Device context base array address = 0x%llx (DMA), %p (virt)",
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(unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
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xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
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@ -2297,8 +2314,9 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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xhci->cmd_ring = xhci_ring_alloc(xhci, 1, 1, TYPE_COMMAND, flags);
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if (!xhci->cmd_ring)
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goto fail;
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xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring);
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xhci_dbg(xhci, "First segment DMA is 0x%llx\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Allocated command ring at %p", xhci->cmd_ring);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "First segment DMA is 0x%llx",
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(unsigned long long)xhci->cmd_ring->first_seg->dma);
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/* Set the address in the Command Ring Control register */
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@ -2306,7 +2324,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
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(xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
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xhci->cmd_ring->cycle_state;
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xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Setting command ring address to 0x%x", val);
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xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
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xhci_dbg_cmd_ptrs(xhci);
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@ -2322,8 +2341,9 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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val = xhci_readl(xhci, &xhci->cap_regs->db_off);
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val &= DBOFF_MASK;
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xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
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" from cap regs base addr\n", val);
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Doorbell array is located at offset 0x%x"
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" from cap regs base addr", val);
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xhci->dba = (void __iomem *) xhci->cap_regs + val;
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xhci_dbg_regs(xhci);
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xhci_print_run_regs(xhci);
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@ -2334,7 +2354,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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* Event ring setup: Allocate a normal ring, but also setup
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* the event ring segment table (ERST). Section 4.9.3.
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*/
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xhci_dbg(xhci, "// Allocating event ring\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Allocating event ring");
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xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, 1, TYPE_EVENT,
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flags);
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if (!xhci->event_ring)
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@ -2347,13 +2367,15 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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GFP_KERNEL);
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if (!xhci->erst.entries)
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goto fail;
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xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Allocated event ring segment table at 0x%llx",
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(unsigned long long)dma);
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memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
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xhci->erst.num_entries = ERST_NUM_SEGS;
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xhci->erst.erst_dma_addr = dma;
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xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx",
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xhci->erst.num_entries,
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xhci->erst.entries,
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(unsigned long long)xhci->erst.erst_dma_addr);
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@ -2371,13 +2393,16 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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val = xhci_readl(xhci, &xhci->ir_set->erst_size);
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val &= ERST_SIZE_MASK;
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val |= ERST_NUM_SEGS;
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xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Write ERST size = %i to ir_set 0 (some bits preserved)",
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val);
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xhci_writel(xhci, val, &xhci->ir_set->erst_size);
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xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Set ERST entries to point to event ring.");
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/* set the segment table base address */
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xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"// Set ERST base address for ir_set 0 = 0x%llx",
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(unsigned long long)xhci->erst.erst_dma_addr);
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val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
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val_64 &= ERST_PTR_MASK;
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@ -2386,7 +2411,8 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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/* Set the event ring dequeue address */
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xhci_set_hc_event_deq(xhci);
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xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
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xhci_dbg_trace(xhci, trace_xhci_dbg_init,
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"Wrote ERST address to ir_set 0.");
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xhci_print_ir_set(xhci, 0);
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/*
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@ -57,6 +57,11 @@ DEFINE_EVENT(xhci_log_msg, xhci_dbg_cancel_urb,
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TP_ARGS(vaf)
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);
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DEFINE_EVENT(xhci_log_msg, xhci_dbg_init,
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TP_PROTO(struct va_format *vaf),
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TP_ARGS(vaf)
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);
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DECLARE_EVENT_CLASS(xhci_log_ctx,
|
||||
TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx,
|
||||
unsigned int ep_num),
|
||||
|
@ -101,7 +101,7 @@ void xhci_quiesce(struct xhci_hcd *xhci)
|
||||
int xhci_halt(struct xhci_hcd *xhci)
|
||||
{
|
||||
int ret;
|
||||
xhci_dbg(xhci, "// Halt the HC\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
|
||||
xhci_quiesce(xhci);
|
||||
|
||||
ret = xhci_handshake(xhci, &xhci->op_regs->status,
|
||||
@ -125,7 +125,7 @@ static int xhci_start(struct xhci_hcd *xhci)
|
||||
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
temp |= (CMD_RUN);
|
||||
xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
|
||||
temp);
|
||||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||||
|
||||
@ -163,7 +163,7 @@ int xhci_reset(struct xhci_hcd *xhci)
|
||||
return 0;
|
||||
}
|
||||
|
||||
xhci_dbg(xhci, "// Reset the HC\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
|
||||
command = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
command |= CMD_RESET;
|
||||
xhci_writel(xhci, command, &xhci->op_regs->command);
|
||||
@ -173,7 +173,8 @@ int xhci_reset(struct xhci_hcd *xhci)
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
xhci_dbg(xhci, "Wait for controller to be ready for doorbell rings\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"Wait for controller to be ready for doorbell rings");
|
||||
/*
|
||||
* xHCI cannot write to any doorbells or operational registers other
|
||||
* than status until the "Controller Not Ready" flag is cleared.
|
||||
@ -215,14 +216,16 @@ static int xhci_setup_msi(struct xhci_hcd *xhci)
|
||||
|
||||
ret = pci_enable_msi(pdev);
|
||||
if (ret) {
|
||||
xhci_dbg(xhci, "failed to allocate MSI entry\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"failed to allocate MSI entry");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = request_irq(pdev->irq, xhci_msi_irq,
|
||||
0, "xhci_hcd", xhci_to_hcd(xhci));
|
||||
if (ret) {
|
||||
xhci_dbg(xhci, "disable MSI interrupt\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"disable MSI interrupt");
|
||||
pci_disable_msi(pdev);
|
||||
}
|
||||
|
||||
@ -285,7 +288,8 @@ static int xhci_setup_msix(struct xhci_hcd *xhci)
|
||||
|
||||
ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
|
||||
if (ret) {
|
||||
xhci_dbg(xhci, "Failed to enable MSI-X\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"Failed to enable MSI-X");
|
||||
goto free_entries;
|
||||
}
|
||||
|
||||
@ -301,7 +305,7 @@ static int xhci_setup_msix(struct xhci_hcd *xhci)
|
||||
return ret;
|
||||
|
||||
disable_msix:
|
||||
xhci_dbg(xhci, "disable MSI-X interrupt\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
|
||||
xhci_free_irq(xhci);
|
||||
pci_disable_msix(pdev);
|
||||
free_entries:
|
||||
@ -509,17 +513,18 @@ int xhci_init(struct usb_hcd *hcd)
|
||||
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
|
||||
int retval = 0;
|
||||
|
||||
xhci_dbg(xhci, "xhci_init\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
|
||||
spin_lock_init(&xhci->lock);
|
||||
if (xhci->hci_version == 0x95 && link_quirk) {
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
|
||||
"QUIRK: Not clearing Link TRB chain bits.");
|
||||
xhci->quirks |= XHCI_LINK_TRB_QUIRK;
|
||||
} else {
|
||||
xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"xHCI doesn't need link TRB QUIRK");
|
||||
}
|
||||
retval = xhci_mem_init(xhci, GFP_KERNEL);
|
||||
xhci_dbg(xhci, "Finished xhci_init\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
|
||||
|
||||
/* Initializing Compliance Mode Recovery Data If Needed */
|
||||
if (xhci_compliance_mode_recovery_timer_quirk_check()) {
|
||||
@ -545,7 +550,8 @@ static int xhci_run_finished(struct xhci_hcd *xhci)
|
||||
if (xhci->quirks & XHCI_NEC_HOST)
|
||||
xhci_ring_cmd_db(xhci);
|
||||
|
||||
xhci_dbg(xhci, "Finished xhci_run for USB3 roothub\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"Finished xhci_run for USB3 roothub");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -576,7 +582,7 @@ int xhci_run(struct usb_hcd *hcd)
|
||||
if (!usb_hcd_is_primary_hcd(hcd))
|
||||
return xhci_run_finished(xhci);
|
||||
|
||||
xhci_dbg(xhci, "xhci_run\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
|
||||
|
||||
ret = xhci_try_enable_msi(hcd);
|
||||
if (ret)
|
||||
@ -594,9 +600,11 @@ int xhci_run(struct usb_hcd *hcd)
|
||||
xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
|
||||
temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
|
||||
temp_64 &= ~ERST_PTR_MASK;
|
||||
xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"ERST deq = 64'h%0lx", (long unsigned int) temp_64);
|
||||
|
||||
xhci_dbg(xhci, "// Set the interrupt modulation register\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"// Set the interrupt modulation register");
|
||||
temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
|
||||
temp &= ~ER_IRQ_INTERVAL_MASK;
|
||||
temp |= (u32) 160;
|
||||
@ -605,12 +613,13 @@ int xhci_run(struct usb_hcd *hcd)
|
||||
/* Set the HCD state before we enable the irqs */
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->command);
|
||||
temp |= (CMD_EIE);
|
||||
xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
|
||||
temp);
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"// Enable interrupts, cmd = 0x%x.", temp);
|
||||
xhci_writel(xhci, temp, &xhci->op_regs->command);
|
||||
|
||||
temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
|
||||
xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
|
||||
xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
|
||||
xhci_writel(xhci, ER_IRQ_ENABLE(temp),
|
||||
&xhci->ir_set->irq_pending);
|
||||
@ -620,7 +629,8 @@ int xhci_run(struct usb_hcd *hcd)
|
||||
xhci_queue_vendor_command(xhci, 0, 0, 0,
|
||||
TRB_TYPE(TRB_NEC_GET_FW));
|
||||
|
||||
xhci_dbg(xhci, "Finished xhci_run for USB2 roothub\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"Finished xhci_run for USB2 roothub");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -680,7 +690,8 @@ void xhci_stop(struct usb_hcd *hcd)
|
||||
if (xhci->quirks & XHCI_AMD_PLL_FIX)
|
||||
usb_amd_dev_put();
|
||||
|
||||
xhci_dbg(xhci, "// Disabling event ring interrupts\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"// Disabling event ring interrupts");
|
||||
temp = xhci_readl(xhci, &xhci->op_regs->status);
|
||||
xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
|
||||
temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
|
||||
@ -688,10 +699,11 @@ void xhci_stop(struct usb_hcd *hcd)
|
||||
&xhci->ir_set->irq_pending);
|
||||
xhci_print_ir_set(xhci, 0);
|
||||
|
||||
xhci_dbg(xhci, "cleaning up memory\n");
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
|
||||
xhci_mem_cleanup(xhci);
|
||||
xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
|
||||
xhci_readl(xhci, &xhci->op_regs->status));
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"xhci_stop completed - status = %x",
|
||||
xhci_readl(xhci, &xhci->op_regs->status));
|
||||
}
|
||||
|
||||
/*
|
||||
@ -716,8 +728,9 @@ void xhci_shutdown(struct usb_hcd *hcd)
|
||||
|
||||
xhci_cleanup_msix(xhci);
|
||||
|
||||
xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
|
||||
xhci_readl(xhci, &xhci->op_regs->status));
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"xhci_shutdown completed - status = %x",
|
||||
xhci_readl(xhci, &xhci->op_regs->status));
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
@ -758,7 +771,8 @@ static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
|
||||
xhci->cmd_ring->dequeue) &
|
||||
(u64) ~CMD_RING_RSVD_BITS) |
|
||||
xhci->cmd_ring->cycle_state;
|
||||
xhci_dbg(xhci, "// Setting command ring address to 0x%llx\n",
|
||||
xhci_dbg_trace(xhci, trace_xhci_dbg_init,
|
||||
"// Setting command ring address to 0x%llx",
|
||||
(long unsigned long) val_64);
|
||||
xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user