AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2024-12-02 06:26:39 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

Merge commit 'v3.4' into x86/urgent

Browse Source
This commit is contained in:
H. Peter Anvin 2012-05-21 12:17:50 -07:00
commit d13a822e6d
245 changed files with 1813 additions and 1231 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
Documentation/feature-removal-schedule.txt
View File

@ -539,3 +539,13 @@ When: 3.6
Why: setitimer is not returning -EFAULT if user pointer is NULL. This
violates the spec.
Who: Sasikantha Babu <sasikanth.v19@gmail.com>
----------------------------
What: V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls
When: 3.7
Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated
for about 4 years and they are not used by any mainline driver.
There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide
similar functionality.
Who: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>

3
MAINTAINERS
View File

@ -1968,7 +1968,9 @@ S: Maintained
F: drivers/net/ethernet/ti/cpmac.c
CPU FREQUENCY DRIVERS
M: Rafael J. Wysocki <rjw@sisk.pl>
L: cpufreq@vger.kernel.org
L: linux-pm@vger.kernel.org
S: Maintained
F: drivers/cpufreq/
F: include/linux/cpufreq.h
@ -4034,6 +4036,7 @@ F: Documentation/scsi/53c700.txt
F: drivers/scsi/53c700*
LED SUBSYSTEM
M: Bryan Wu <bryan.wu@canonical.com>
M: Richard Purdie <rpurdie@rpsys.net>
S: Maintained
F: drivers/leds/

11
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3
PATCHLEVEL = 4
SUBLEVEL = 0
EXTRAVERSION = -rc6
EXTRAVERSION =
NAME = Saber-toothed Squirrel
# *DOCUMENTATION*
@ -442,7 +442,7 @@ asm-generic:
no-dot-config-targets := clean mrproper distclean \
cscope gtags TAGS tags help %docs check% coccicheck \
include/linux/version.h headers_% archheaders \
include/linux/version.h headers_% archheaders archscripts \
kernelversion %src-pkg
config-targets := 0
@ -979,7 +979,7 @@ prepare1: prepare2 include/linux/version.h include/generated/utsrelease.h \
include/config/auto.conf
$(cmd_crmodverdir)
archprepare: archheaders prepare1 scripts_basic
archprepare: archheaders archscripts prepare1 scripts_basic
prepare0: archprepare FORCE
$(Q)$(MAKE) $(build)=.
@ -1049,8 +1049,11 @@ hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm)
PHONY += archheaders
archheaders:
PHONY += archscripts
archscripts:
PHONY += __headers
__headers: include/linux/version.h scripts_basic asm-generic archheaders FORCE
__headers: include/linux/version.h scripts_basic asm-generic archheaders archscripts FORCE
$(Q)$(MAKE) $(build)=scripts build_unifdef
PHONY += headers_install_all

24
arch/arm/kernel/ptrace.c
View File

@ -906,27 +906,14 @@ long arch_ptrace(struct task_struct *child, long request,
return ret;
}
#ifdef __ARMEB__
#define AUDIT_ARCH_NR AUDIT_ARCH_ARMEB
#else
#define AUDIT_ARCH_NR AUDIT_ARCH_ARM
#endif
asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
{
unsigned long ip;
/*
* Save IP. IP is used to denote syscall entry/exit:
* IP = 0 -> entry, = 1 -> exit
*/
ip = regs->ARM_ip;
regs->ARM_ip = why;
if (!ip)
if (why)
audit_syscall_exit(regs);
else
audit_syscall_entry(AUDIT_ARCH_NR, scno, regs->ARM_r0,
audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
if (!test_thread_flag(TIF_SYSCALL_TRACE))
@ -936,6 +923,13 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
current_thread_info()->syscall = scno;
/*
* IP is used to denote syscall entry/exit:
* IP = 0 -> entry, =1 -> exit
*/
ip = regs->ARM_ip;
regs->ARM_ip = why;
/* the 0x80 provides a way for the tracing parent to distinguish
between a syscall stop and SIGTRAP delivery */
ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)

4
arch/arm/kernel/smp.c
View File

@ -251,8 +251,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
struct mm_struct *mm = &init_mm;
unsigned int cpu = smp_processor_id();
printk("CPU%u: Booted secondary processor\n", cpu);
/*
* All kernel threads share the same mm context; grab a
* reference and switch to it.
@ -264,6 +262,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
enter_lazy_tlb(mm, current);
local_flush_tlb_all();
printk("CPU%u: Booted secondary processor\n", cpu);
cpu_init();
preempt_disable();
trace_hardirqs_off();

2
arch/arm/kernel/sys_arm.c
View File

@ -115,7 +115,7 @@ int kernel_execve(const char *filename,
"Ir" (THREAD_START_SP - sizeof(regs)),
"r" (&regs),
"Ir" (sizeof(regs))
: "r0", "r1", "r2", "r3", "ip", "lr", "memory");
: "r0", "r1", "r2", "r3", "r8", "r9", "ip", "lr", "memory");
out:
return ret;

3
arch/arm/mach-exynos/Kconfig
View File

@ -232,6 +232,9 @@ config MACH_ARMLEX4210
config MACH_UNIVERSAL_C210
bool "Mobile UNIVERSAL_C210 Board"
select CPU_EXYNOS4210
select S5P_HRT
select CLKSRC_MMIO
select HAVE_SCHED_CLOCK
select S5P_GPIO_INT
select S5P_DEV_FIMC0
select S5P_DEV_FIMC1

2
arch/arm/mach-exynos/clock-exynos5.c
View File

@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
.name = "dma",
.devname = "dma-pl330.1",
.enable = exynos5_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 1),
.ctrlbit = (1 << 2),
};
static struct clk exynos5_clk_mdma1 = {

4
arch/arm/mach-exynos/mach-universal_c210.c
View File

@ -40,6 +40,7 @@
#include <plat/pd.h>
#include <plat/regs-fb-v4.h>
#include <plat/fimc-core.h>
#include <plat/s5p-time.h>
#include <plat/camport.h>
#include <plat/mipi_csis.h>
@ -1063,6 +1064,7 @@ static void __init universal_map_io(void)
exynos_init_io(NULL, 0);
s3c24xx_init_clocks(24000000);
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
}
static void s5p_tv_setup(void)
@ -1113,7 +1115,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
.map_io = universal_map_io,
.handle_irq = gic_handle_irq,
.init_machine = universal_machine_init,
.timer = &exynos4_timer,
.timer = &s5p_timer,
.reserve = &universal_reserve,
.restart = exynos4_restart,
MACHINE_END

1
arch/arm/mach-kirkwood/board-dt.c
View File

@ -14,6 +14,7 @@
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/kexec.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <mach/bridge-regs.h>

2
arch/arm/mach-omap1/ams-delta-fiq.c
View File

@ -48,7 +48,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
struct irq_chip *irq_chip = NULL;
int gpio, irq_num, fiq_count;
irq_desc = irq_to_desc(IH_GPIO_BASE);
irq_desc = irq_to_desc(gpio_to_irq(AMS_DELTA_GPIO_PIN_KEYBRD_CLK));
if (irq_desc)
irq_chip = irq_desc->irq_data.chip;

2
arch/arm/mach-omap2/board-igep0020.c
View File

@ -641,7 +641,7 @@ static struct regulator_consumer_supply dummy_supplies[] = {
static void __init igep_init(void)
{
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
/* Get IGEP2 hardware revision */

8
arch/arm/mach-omap2/include/mach/ctrl_module_pad_core_44xx.h
View File

@ -941,10 +941,10 @@
#define OMAP4_DSI2_LANEENABLE_MASK (0x7 << 29)
#define OMAP4_DSI1_LANEENABLE_SHIFT 24
#define OMAP4_DSI1_LANEENABLE_MASK (0x1f << 24)
#define OMAP4_DSI2_PIPD_SHIFT 19
#define OMAP4_DSI2_PIPD_MASK (0x1f << 19)
#define OMAP4_DSI1_PIPD_SHIFT 14
#define OMAP4_DSI1_PIPD_MASK (0x1f << 14)
#define OMAP4_DSI1_PIPD_SHIFT 19
#define OMAP4_DSI1_PIPD_MASK (0x1f << 19)
#define OMAP4_DSI2_PIPD_SHIFT 14
#define OMAP4_DSI2_PIPD_MASK (0x1f << 14)
/* CONTROL_MCBSPLP */
#define OMAP4_ALBCTRLRX_FSX_SHIFT 31

4
arch/arm/mach-orion5x/mpp.h
View File

@ -65,8 +65,8 @@
#define MPP8_GIGE MPP(8, 0x1, 0, 0, 1, 1, 1)
#define MPP9_UNUSED MPP(9, 0x0, 0, 0, 1, 1, 1)
#define MPP9_GPIO MPP(9, 0x0, 0, 0, 1, 1, 1)
#define MPP9_GIGE MPP(9, 0x1, 1, 1, 1, 1, 1)
#define MPP9_GPIO MPP(9, 0x0, 1, 1, 1, 1, 1)
#define MPP9_GIGE MPP(9, 0x1, 0, 0, 1, 1, 1)
#define MPP10_UNUSED MPP(10, 0x0, 0, 0, 1, 1, 1)
#define MPP10_GPIO MPP(10, 0x0, 1, 1, 1, 1, 1)

6
arch/arm/mach-prima2/irq.c
View File

@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
static __init void sirfsoc_irq_init(void)
{
sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32);
sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32);
sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32,
SIRFSOC_INTENAL_IRQ_END + 1 - 32);
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0);
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1);
@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void)
if (!sirfsoc_intc_base)
panic("unable to map intc cpu registers\n");
irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0,
&irq_domain_simple_ops, NULL);
of_node_put(np);

22
arch/arm/mach-shmobile/board-ag5evm.c
View File

@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = {
};
/* SDHI0 */
static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
{
struct device *dev = arg;
struct sh_mobile_sdhi_info *info = dev->platform_data;
struct tmio_mmc_data *pdata = info->pdata;
tmio_mmc_cd_wakeup(pdata);
return IRQ_HANDLED;
}
static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
.cd_gpio = GPIO_PORT251,
};
static struct resource sdhi0_resources[] = {
@ -557,7 +547,6 @@ static void __init ag5evm_init(void)
lcd_backlight_reset();
/* enable SDHI0 on CN15 [SD I/F] */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
@ -566,13 +555,6 @@ static void __init ag5evm_init(void)
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
"sdhi0 cd", &sdhi0_device.dev))
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
else
pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
/* enable SDHI1 on CN4 [WLAN I/F] */
gpio_request(GPIO_FN_SDHICLK1, NULL);
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);

22
arch/arm/mach-shmobile/board-mackerel.c
View File

@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev)
}
/* SDHI0 */
static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
{
struct device *dev = arg;
struct sh_mobile_sdhi_info *info = dev->platform_data;
struct tmio_mmc_data *pdata = info->pdata;
tmio_mmc_cd_wakeup(pdata);
return IRQ_HANDLED;
}
static struct sh_mobile_sdhi_info sdhi0_info = {
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
.tmio_flags = TMIO_MMC_USE_GPIO_CD,
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
.cd_gpio = GPIO_PORT172,
};
static struct resource sdhi0_resources[] = {
@ -1384,7 +1375,6 @@ static void __init mackerel_init(void)
{
u32 srcr4;
struct clk *clk;
int ret;
/* External clock source */
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
@ -1481,7 +1471,6 @@ static void __init mackerel_init(void)
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
/* enable SDHI0 */
gpio_request(GPIO_FN_SDHICD0, NULL);
gpio_request(GPIO_FN_SDHIWP0, NULL);
gpio_request(GPIO_FN_SDHICMD0, NULL);
gpio_request(GPIO_FN_SDHICLK0, NULL);
@ -1490,13 +1479,6 @@ static void __init mackerel_init(void)
gpio_request(GPIO_FN_SDHID0_1, NULL);
gpio_request(GPIO_FN_SDHID0_0, NULL);
ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
if (!ret)
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
else
pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
/* enable SDHI1 */
gpio_request(GPIO_FN_SDHICMD1, NULL);

56
arch/arm/mach-shmobile/headsmp.S
View File

@ -16,6 +16,59 @@
__CPUINIT
/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!
*
* The secondary kernel init calls v7_flush_dcache_all before it enables
* the L1; however, the L1 comes out of reset in an undefined state, so
* the clean + invalidate performed by v7_flush_dcache_all causes a bunch
* of cache lines with uninitialized data and uninitialized tags to get
* written out to memory, which does really unpleasant things to the main
* processor. We fix this by performing an invalidate, rather than a
* clean + invalidate, before jumping into the kernel.
*
* This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs
* to be called for both secondary cores startup and primary core resume
* procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S.
*/
ENTRY(v7_invalidate_l1)
mov r0, #0
mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
mcr p15, 2, r0, c0, c0, 0
mrc p15, 1, r0, c0, c0, 0
ldr r1, =0x7fff
and r2, r1, r0, lsr #13
ldr r1, =0x3ff
and r3, r1, r0, lsr #3 @ NumWays - 1
add r2, r2, #1 @ NumSets
and r0, r0, #0x7
add r0, r0, #4 @ SetShift
clz r1, r3 @ WayShift
add r4, r3, #1 @ NumWays
1: sub r2, r2, #1 @ NumSets--
mov r3, r4 @ Temp = NumWays
2: subs r3, r3, #1 @ Temp--
mov r5, r3, lsl r1
mov r6, r2, lsl r0
orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
mcr p15, 0, r5, c7, c6, 2
bgt 2b
cmp r2, #0
bgt 1b
dsb
isb
mov pc, lr
ENDPROC(v7_invalidate_l1)
ENTRY(shmobile_invalidate_start)
bl v7_invalidate_l1
b secondary_startup
ENDPROC(shmobile_invalidate_start)
/*
* Reset vector for secondary CPUs.
* This will be mapped at address 0 by SBAR register.
@ -24,4 +77,5 @@
.align 12
ENTRY(shmobile_secondary_vector)
ldr pc, 1f
1: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET
1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
ENDPROC(shmobile_secondary_vector)

2
arch/arm/mach-shmobile/include/mach/common.h
View File

@ -4,7 +4,6 @@
extern void shmobile_earlytimer_init(void);
extern struct sys_timer shmobile_timer;
struct twd_local_timer;
void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
extern void shmobile_setup_console(void);
extern void shmobile_secondary_vector(void);
extern int shmobile_platform_cpu_kill(unsigned int cpu);
@ -82,5 +81,6 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu);
extern void r8a7779_secondary_init(unsigned int cpu);
extern int r8a7779_boot_secondary(unsigned int cpu);
extern void r8a7779_smp_prepare_cpus(void);
extern void r8a7779_register_twd(void);
#endif /* __ARCH_MACH_COMMON_H */

4
arch/arm/mach-shmobile/setup-r8a7779.c
View File

@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void)
ARRAY_SIZE(r8a7779_late_devices));
}
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
void __init __weak r8a7779_register_twd(void) { }
static void __init r8a7779_earlytimer_init(void)
{
r8a7779_clock_init();
shmobile_earlytimer_init();
r8a7779_register_twd();
}
void __init r8a7779_add_early_devices(void)

4
arch/arm/mach-shmobile/setup-sh73a0.c
View File

@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void)
ARRAY_SIZE(sh73a0_late_devices));
}
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
void __init __weak sh73a0_register_twd(void) { }
static void __init sh73a0_earlytimer_init(void)
{
sh73a0_clock_init();
shmobile_earlytimer_init();
sh73a0_register_twd();
}
void __init sh73a0_add_early_devices(void)

8
arch/arm/mach-shmobile/smp-r8a7779.c
View File

@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void)
static DEFINE_SPINLOCK(scu_lock);
static unsigned long tmp;
#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
void __init r8a7779_register_twd(void)
{
twd_local_timer_register(&twd_local_timer);
}
#endif
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
void __iomem *scu_base = scu_base_addr();
@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
shmobile_twd_init(&twd_local_timer);
return scu_get_core_count(scu_base);
}

7
arch/arm/mach-shmobile/smp-sh73a0.c
View File

@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void)
static DEFINE_SPINLOCK(scu_lock);
static unsigned long tmp;
#ifdef CONFIG_HAVE_ARM_TWD
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
void __init sh73a0_register_twd(void)
{
twd_local_timer_register(&twd_local_timer);
}
#endif
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
{
@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void)
{
void __iomem *scu_base = scu_base_addr();
shmobile_twd_init(&twd_local_timer);
return scu_get_core_count(scu_base);
}

9
arch/arm/mach-shmobile/timer.c
View File

@ -46,15 +46,6 @@ static void __init shmobile_timer_init(void)
{
}
void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
{
#ifdef CONFIG_HAVE_ARM_TWD
int err = twd_local_timer_register(twd_local_timer);
if (err)
pr_err("twd_local_timer_register failed %d\n", err);
#endif
}
struct sys_timer shmobile_timer = {
.init = shmobile_timer_init,
};

4
arch/arm/mach-tegra/flowctrl.c
View File

@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
{
return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
}
void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
{
return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
}

4
arch/arm/mm/fault.c
View File

@ -247,7 +247,9 @@ __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
check_stack:
if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
/* Don't allow expansion below FIRST_USER_ADDRESS */
if (vma->vm_flags & VM_GROWSDOWN &&
addr >= FIRST_USER_ADDRESS && !expand_stack(vma, addr))
goto good_area;
out:
return fault;

3
arch/arm/mm/mmu.c
View File

@ -489,7 +489,8 @@ static void __init build_mem_type_table(void)
*/
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
mem_types[i].prot_pte |= PTE_EXT_AF;
mem_types[i].prot_sect |= PMD_SECT_AF;
if (mem_types[i].prot_sect)
mem_types[i].prot_sect |= PMD_SECT_AF;
}
kern_pgprot |= PTE_EXT_AF;
vecs_pgprot |= PTE_EXT_AF;

24
arch/arm/vfp/vfpmodule.c
View File

@ -11,6 +11,7 @@
#include <linux/types.h>
#include <linux/cpu.h>
#include <linux/cpu_pm.h>
#include <linux/hardirq.h>
#include <linux/kernel.h>
#include <linux/notifier.h>
#include <linux/signal.h>
@ -432,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
static void vfp_enable(void *unused)
{
u32 access = get_copro_access();
u32 access;
BUG_ON(preemptible());
access = get_copro_access();
/*
* Enable full access to VFP (cp10 and cp11)
@ -573,12 +577,6 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
* entry.
*/
hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
/*
* Disable VFP in the hwstate so that we can detect if it gets
* used.
*/
hwstate->fpexc &= ~FPEXC_EN;
return 0;
}
@ -591,12 +589,8 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
unsigned long fpexc;
int err = 0;
/*
* If VFP has been used, then disable it to avoid corrupting
* the new thread state.
*/
if (hwstate->fpexc & FPEXC_EN)
vfp_flush_hwstate(thread);
/* Disable VFP to avoid corrupting the new thread state. */
vfp_flush_hwstate(thread);
/*
* Copy the floating point registers. There can be unused
@ -657,7 +651,7 @@ static int __init vfp_init(void)
unsigned int cpu_arch = cpu_architecture();
if (cpu_arch >= CPU_ARCH_ARMv6)
vfp_enable(NULL);
on_each_cpu(vfp_enable, NULL, 1);
/*
* First check that there is a VFP that we can use.
@ -678,8 +672,6 @@ static int __init vfp_init(void)
} else {
hotcpu_notifier(vfp_hotplug, 0);
smp_call_function(vfp_enable, NULL, 1);
VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,

4
arch/frv/include/asm/processor.h
View File

@ -135,10 +135,6 @@ unsigned long get_wchan(struct task_struct *p);
#define KSTK_EIP(tsk) ((tsk)->thread.frame0->pc)
#define KSTK_ESP(tsk) ((tsk)->thread.frame0->sp)
/* Allocation and freeing of basic task resources. */
extern struct task_struct *alloc_task_struct_node(int node);
extern void free_task_struct(struct task_struct *p);
#define cpu_relax() barrier()
/* data cache prefetch */

2
arch/ia64/kvm/kvm-ia64.c
View File

@ -1174,7 +1174,7 @@ static enum hrtimer_restart hlt_timer_fn(struct hrtimer *data)
bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
{
return irqchip_in_kernel(vcpu->kcm) == (vcpu->arch.apic != NULL);
return irqchip_in_kernel(vcpu->kvm) == (vcpu->arch.apic != NULL);
}
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)

6
arch/m68k/platform/520x/config.c
View File

@ -22,7 +22,7 @@
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m520x_qspi_init(void)
{
@ -35,7 +35,7 @@ static void __init m520x_qspi_init(void)
writew(par, MCF_GPIO_PAR_UART);
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -79,7 +79,7 @@ void __init config_BSP(char *commandp, int size)
mach_sched_init = hw_timer_init;
m520x_uarts_init();
m520x_fec_init();
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m520x_qspi_init();
#endif
}

6
arch/m68k/platform/523x/config.c
View File

@ -22,7 +22,7 @@
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m523x_qspi_init(void)
{
@ -36,7 +36,7 @@ static void __init m523x_qspi_init(void)
writew(par, MCFGPIO_PAR_TIMER);
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -58,7 +58,7 @@ void __init config_BSP(char *commandp, int size)
{
mach_sched_init = hw_timer_init;
m523x_fec_init();
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m523x_qspi_init();
#endif
}

6
arch/m68k/platform/5249/config.c
View File

@ -51,7 +51,7 @@ static struct platform_device *m5249_devices[] __initdata = {
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m5249_qspi_init(void)
{
@ -61,7 +61,7 @@ static void __init m5249_qspi_init(void)
mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
#ifdef CONFIG_M5249C3
m5249_smc91x_init();
#endif
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m5249_qspi_init();
#endif
}

6
arch/m68k/platform/527x/config.c
View File

@ -23,7 +23,7 @@
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m527x_qspi_init(void)
{
@ -42,7 +42,7 @@ static void __init m527x_qspi_init(void)
#endif
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
mach_sched_init = hw_timer_init;
m527x_uarts_init();
m527x_fec_init();
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m527x_qspi_init();
#endif
}

6
arch/m68k/platform/528x/config.c
View File

@ -24,7 +24,7 @@
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m528x_qspi_init(void)
{
@ -32,7 +32,7 @@ static void __init m528x_qspi_init(void)
__raw_writeb(0x07, MCFGPIO_PQSPAR);
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -98,7 +98,7 @@ void __init config_BSP(char *commandp, int size)
mach_sched_init = hw_timer_init;
m528x_uarts_init();
m528x_fec_init();
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m528x_qspi_init();
#endif
}

6
arch/m68k/platform/532x/config.c
View File

@ -30,7 +30,7 @@
/***************************************************************************/
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
static void __init m532x_qspi_init(void)
{
@ -38,7 +38,7 @@ static void __init m532x_qspi_init(void)
writew(0x01f0, MCF_GPIO_PAR_QSPI);
}
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
/***************************************************************************/
@ -77,7 +77,7 @@ void __init config_BSP(char *commandp, int size)
mach_sched_init = hw_timer_init;
m532x_uarts_init();
m532x_fec_init();
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
m532x_qspi_init();
#endif

6
arch/m68k/platform/coldfire/device.c
View File

@ -121,7 +121,7 @@ static struct platform_device mcf_fec1 = {
#endif /* MCFFEC_BASE1 */
#endif /* CONFIG_FEC */
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
/*
* The ColdFire QSPI module is an SPI protocol hardware block used
* on a number of different ColdFire CPUs.
@ -274,7 +274,7 @@ static struct platform_device mcf_qspi = {
.resource = mcf_qspi_resources,
.dev.platform_data = &mcf_qspi_data,
};
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
static struct platform_device *mcf_devices[] __initdata = {
&mcf_uart,
@ -284,7 +284,7 @@ static struct platform_device *mcf_devices[] __initdata = {
&mcf_fec1,
#endif
#endif
#ifdef CONFIG_SPI_COLDFIRE_QSPI
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
&mcf_qspi,
#endif
};

9
arch/mn10300/kernel/smp.c
View File

@ -24,6 +24,7 @@
#include <linux/sched.h>
#include <linux/profile.h>
#include <linux/smp.h>
#include <linux/cpu.h>
#include <asm/tlbflush.h>
#include <asm/bitops.h>
#include <asm/processor.h>
@ -38,7 +39,6 @@
#include "internal.h"
#ifdef CONFIG_HOTPLUG_CPU
#include <linux/cpu.h>
#include <asm/cacheflush.h>
static unsigned long sleep_mode[NR_CPUS];
@ -874,10 +874,13 @@ static void __init smp_online(void)
cpu = smp_processor_id();
local_irq_enable();
notify_cpu_starting(cpu);
ipi_call_lock();
set_cpu_online(cpu, true);
smp_wmb();
ipi_call_unlock();
local_irq_enable();
}
/**

3
arch/parisc/include/asm/hardware.h
View File

@ -2,7 +2,6 @@
#define _PARISC_HARDWARE_H
#include <linux/mod_devicetable.h>
#include <asm/pdc.h>
#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
@ -95,12 +94,14 @@ struct bc_module {
#define HPHW_MC 15
#define HPHW_FAULTY 31
struct parisc_device_id;
/* hardware.c: */
extern const char *parisc_hardware_description(struct parisc_device_id *id);
extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
struct pci_dev;
struct hardware_path;
/* drivers.c: */
extern struct parisc_device *alloc_pa_dev(unsigned long hpa,

6
arch/parisc/include/asm/page.h
View File

@ -160,5 +160,11 @@ extern int npmem_ranges;
#include <asm-generic/memory_model.h>
#include <asm-generic/getorder.h>
#include <asm/pdc.h>
#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
/* DEFINITION OF THE ZERO-PAGE (PAG0) */
/* based on work by Jason Eckhardt (jason@equator.com) */
#endif /* _PARISC_PAGE_H */

7
arch/parisc/include/asm/pdc.h
View File

@ -343,8 +343,6 @@
#ifdef __KERNEL__
#include <asm/page.h> /* for __PAGE_OFFSET */
extern int pdc_type;
/* Values for pdc_type */
@ -677,11 +675,6 @@ static inline char * os_id_to_string(u16 os_id) {
#endif /* __KERNEL__ */
#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
/* DEFINITION OF THE ZERO-PAGE (PAG0) */
/* based on work by Jason Eckhardt (jason@equator.com) */
/* flags of the device_path */
#define PF_AUTOBOOT 0x80
#define PF_AUTOSEARCH 0x40

2
arch/parisc/include/asm/pgtable.h
View File

@ -44,6 +44,8 @@ struct vm_area_struct;
#endif /* !__ASSEMBLY__ */
#include <asm/page.h>
#define pte_ERROR(e) \
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \

7
arch/parisc/include/asm/prefetch.h
View File

@ -21,7 +21,12 @@
#define ARCH_HAS_PREFETCH
static inline void prefetch(const void *addr)
{
__asm__("ldw 0(%0), %%r0" : : "r" (addr));
__asm__(
#ifndef CONFIG_PA20
/* Need to avoid prefetch of NULL on PA7300LC */
" extrw,u,= %0,31,32,%%r0\n"
#endif
" ldw 0(%0), %%r0" : : "r" (addr));
}
/* LDD is a PA2.0 addition. */

2
arch/parisc/include/asm/spinlock.h
View File

@ -1,6 +1,8 @@
#ifndef __ASM_SPINLOCK_H
#define __ASM_SPINLOCK_H
#include <asm/barrier.h>
#include <asm/ldcw.h>
#include <asm/processor.h>
#include <asm/spinlock_types.h>

4
arch/parisc/kernel/entry.S
View File

@ -581,7 +581,11 @@
*/
cmpiclr,= 0x01,\tmp,%r0
ldi (_PAGE_DIRTY|_PAGE_READ|_PAGE_WRITE),\prot
#ifdef CONFIG_64BIT
depd,z \prot,8,7,\prot
#else
depw,z \prot,8,7,\prot
#endif
/*
* OK, it is in the temp alias region, check whether "from" or "to".
* Check "subtle" note in pacache.S re: r23/r26.

38
arch/parisc/kernel/pacache.S
View File

@ -692,7 +692,7 @@ ENTRY(flush_icache_page_asm)
/* Purge any old translation */
pitlb (%sr0,%r28)
pitlb (%sr4,%r28)
ldil L%icache_stride, %r1
ldw R%icache_stride(%r1), %r1
@ -706,27 +706,29 @@ ENTRY(flush_icache_page_asm)
sub %r25, %r1, %r25
1: fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
fic,m %r1(%r28)
/* fic only has the type 26 form on PA1.1, requiring an
* explicit space specification, so use %sr4 */
1: fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
fic,m %r1(%sr4,%r28)
cmpb,COND(<<) %r28, %r25,1b
fic,m %r1(%r28)
fic,m %r1(%sr4,%r28)
sync
bv %r0(%r2)
pitlb (%sr0,%r25)
pitlb (%sr4,%r25)
.exit
.procend

1
arch/parisc/kernel/pdc_cons.c
View File

@ -50,6 +50,7 @@
#include <linux/init.h>
#include <linux/major.h>
#include <linux/tty.h>
#include <asm/page.h> /* for PAGE0 */
#include <asm/pdc.h> /* for iodc_call() proto and friends */
static DEFINE_SPINLOCK(pdc_console_lock);

8
arch/parisc/kernel/smp.c
View File

@ -31,6 +31,7 @@
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/ftrace.h>
#include <linux/cpu.h>
#include <linux/atomic.h>
#include <asm/current.h>
@ -295,8 +296,13 @@ smp_cpu_init(int cpunum)
printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
machine_halt();
}
}
notify_cpu_starting(cpunum);
ipi_call_lock();
set_cpu_online(cpunum, true);
ipi_call_unlock();
/* Initialise the idle task for this CPU */
atomic_inc(&init_mm.mm_count);

1
arch/parisc/kernel/time.c
View File

@ -29,6 +29,7 @@
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/param.h>
#include <asm/pdc.h>
#include <asm/led.h>

7
arch/powerpc/include/asm/exception-64s.h
View File

@ -288,13 +288,6 @@ label##_hv: \
/* Exception addition: Hard disable interrupts */
#define DISABLE_INTS SOFT_DISABLE_INTS(r10,r11)
/* Exception addition: Keep interrupt state */
#define ENABLE_INTS \
ld r11,PACAKMSR(r13); \
ld r12,_MSR(r1); \
rlwimi r11,r12,0,MSR_EE; \
mtmsrd r11,1
#define ADD_NVGPRS \
bl .save_nvgprs

7
arch/powerpc/include/asm/kvm_book3s.h
View File

@ -81,12 +81,13 @@ struct kvmppc_vcpu_book3s {
u64 sdr1;
u64 hior;
u64 msr_mask;
u64 vsid_next;
#ifdef CONFIG_PPC_BOOK3S_32
u32 vsid_pool[VSID_POOL_SIZE];
u32 vsid_next;
#else
u64 vsid_first;
u64 vsid_max;
u64 proto_vsid_first;
u64 proto_vsid_max;
u64 proto_vsid_next;
#endif
int context_id[SID_CONTEXTS];

62
arch/powerpc/kernel/entry_64.S
View File

@ -588,23 +588,19 @@ _GLOBAL(ret_from_except_lite)
fast_exc_return_irq:
restore:
/*
* This is the main kernel exit path, we first check if we
* have to change our interrupt state.
* This is the main kernel exit path. First we check if we
* are about to re-enable interrupts
*/
ld r5,SOFTE(r1)
lbz r6,PACASOFTIRQEN(r13)
cmpwi cr1,r5,0
cmpw cr0,r5,r6
beq cr0,4f
cmpwi cr0,r5,0
beq restore_irq_off
/* We do, handle disable first, which is easy */
bne cr1,3f;
li r0,0
stb r0,PACASOFTIRQEN(r13);
TRACE_DISABLE_INTS
b 4f
/* We are enabling, were we already enabled ? Yes, just return */
cmpwi cr0,r6,1
beq cr0,do_restore
3: /*
/*
* We are about to soft-enable interrupts (we are hard disabled
* at this point). We check if there's anything that needs to
* be replayed first.
@ -626,7 +622,7 @@ restore_no_replay:
/*
* Final return path. BookE is handled in a different file
*/
4:
do_restore:
#ifdef CONFIG_PPC_BOOK3E
b .exception_return_book3e
#else
@ -699,6 +695,25 @@ fast_exception_return:
#endif /* CONFIG_PPC_BOOK3E */
/*
* We are returning to a context with interrupts soft disabled.
*
* However, we may also about to hard enable, so we need to
* make sure that in this case, we also clear PACA_IRQ_HARD_DIS
* or that bit can get out of sync and bad things will happen
*/
restore_irq_off:
ld r3,_MSR(r1)
lbz r7,PACAIRQHAPPENED(r13)
andi. r0,r3,MSR_EE
beq 1f
rlwinm r7,r7,0,~PACA_IRQ_HARD_DIS
stb r7,PACAIRQHAPPENED(r13)
1: li r0,0
stb r0,PACASOFTIRQEN(r13);
TRACE_DISABLE_INTS
b do_restore
/*
* Something did happen, check if a re-emit is needed
* (this also clears paca->irq_happened)
@ -748,6 +763,9 @@ restore_check_irq_replay:
#endif /* CONFIG_PPC_BOOK3E */
1: b .ret_from_except /* What else to do here ? */
3:
do_work:
#ifdef CONFIG_PREEMPT
andi. r0,r3,MSR_PR /* Returning to user mode? */
@ -767,16 +785,6 @@ do_work:
SOFT_DISABLE_INTS(r3,r4)
1: bl .preempt_schedule_irq
/* Hard-disable interrupts again (and update PACA) */
#ifdef CONFIG_PPC_BOOK3E
wrteei 0
#else
ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */
mtmsrd r10,1
#endif /* CONFIG_PPC_BOOK3E */
li r0,PACA_IRQ_HARD_DIS
stb r0,PACAIRQHAPPENED(r13)
/* Re-test flags and eventually loop */
clrrdi r9,r1,THREAD_SHIFT
ld r4,TI_FLAGS(r9)
@ -787,14 +795,6 @@ do_work:
user_work:
#endif /* CONFIG_PREEMPT */
/* Enable interrupts */
#ifdef CONFIG_PPC_BOOK3E
wrteei 1
#else
ori r10,r10,MSR_EE
mtmsrd r10,1
#endif /* CONFIG_PPC_BOOK3E */
andi. r0,r4,_TIF_NEED_RESCHED
beq 1f
bl .restore_interrupts

2
arch/powerpc/kernel/exceptions-64s.S
View File

@ -768,8 +768,8 @@ alignment_common:
std r3,_DAR(r1)
std r4,_DSISR(r1)
bl .save_nvgprs
DISABLE_INTS
addi r3,r1,STACK_FRAME_OVERHEAD
ENABLE_INTS
bl .alignment_exception
b .ret_from_except

21
arch/powerpc/kernel/irq.c
View File

@ -229,6 +229,19 @@ notrace void arch_local_irq_restore(unsigned long en)
*/
if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
__hard_irq_disable();
#ifdef CONFIG_TRACE_IRQFLAG
else {
/*
* We should already be hard disabled here. We had bugs
* where that wasn't the case so let's dbl check it and
* warn if we are wrong. Only do that when IRQ tracing
* is enabled as mfmsr() can be costly.
*/
if (WARN_ON(mfmsr() & MSR_EE))
__hard_irq_disable();
}
#endif /* CONFIG_TRACE_IRQFLAG */
set_soft_enabled(0);
/*
@ -260,11 +273,17 @@ EXPORT_SYMBOL(arch_local_irq_restore);
* if they are currently disabled. This is typically called before
* schedule() or do_signal() when returning to userspace. We do it
* in C to avoid the burden of dealing with lockdep etc...
*
* NOTE: This is called with interrupts hard disabled but not marked
* as such in paca->irq_happened, so we need to resync this.
*/
void restore_interrupts(void)
{
if (irqs_disabled())
if (irqs_disabled()) {
local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
local_irq_enable();
} else
__hard_irq_enable();
}
#endif /* CONFIG_PPC64 */

10
arch/powerpc/kernel/traps.c
View File

@ -248,7 +248,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
addr, regs->nip, regs->link, code);
}
if (!arch_irq_disabled_regs(regs))
if (arch_irqs_disabled() && !arch_irq_disabled_regs(regs))
local_irq_enable();
memset(&info, 0, sizeof(info));
@ -1019,7 +1019,9 @@ void __kprobes program_check_exception(struct pt_regs *regs)
return;
}
local_irq_enable();
/* We restore the interrupt state now */
if (!arch_irq_disabled_regs(regs))
local_irq_enable();
#ifdef CONFIG_MATH_EMULATION
/* (reason & REASON_ILLEGAL) would be the obvious thing here,
@ -1069,6 +1071,10 @@ void alignment_exception(struct pt_regs *regs)
{
int sig, code, fixed = 0;
/* We restore the interrupt state now */
if (!arch_irq_disabled_regs(regs))
local_irq_enable();
/* we don't implement logging of alignment exceptions */
if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
fixed = fix_alignment(regs);

13
arch/powerpc/kvm/book3s_64_mmu_host.c
View File

@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
backwards_map = !backwards_map;
/* Uh-oh ... out of mappings. Let's flush! */
if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
memset(vcpu_book3s->sid_map, 0,
sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
kvmppc_mmu_pte_flush(vcpu, 0, 0);
kvmppc_mmu_flush_segments(vcpu);
}
map->host_vsid = vcpu_book3s->vsid_next++;
map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M);
map->guest_vsid = gvsid;
map->valid = true;
@ -319,9 +319,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
return -1;
vcpu3s->context_id[0] = err;
vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1;
vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
vcpu3s->vsid_next = vcpu3s->vsid_first;
vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
<< USER_ESID_BITS) - 1;
vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
kvmppc_mmu_hpte_init(vcpu);

22
arch/powerpc/kvm/book3s_64_mmu_hv.c
View File

@ -258,6 +258,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
!(memslot->userspace_addr & (s - 1))) {
start &= ~(s - 1);
pgsize = s;
get_page(hpage);
put_page(page);
page = hpage;
}
}
@ -281,11 +283,8 @@ static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
err = 0;
out:
if (got) {
if (PageHuge(page))
page = compound_head(page);
if (got)
put_page(page);
}
return err;
up_err:
@ -678,8 +677,15 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
SetPageDirty(page);
out_put:
if (page)
put_page(page);
if (page) {
/*
* We drop pages[0] here, not page because page might
* have been set to the head page of a compound, but
* we have to drop the reference on the correct tail
* page to match the get inside gup()
*/
put_page(pages[0]);
}
return ret;
out_unlock:
@ -979,6 +985,7 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
pa = *physp;
}
page = pfn_to_page(pa >> PAGE_SHIFT);
get_page(page);
} else {
hva = gfn_to_hva_memslot(memslot, gfn);
npages = get_user_pages_fast(hva, 1, 1, pages);
@ -991,8 +998,6 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
page = compound_head(page);
psize <<= compound_order(page);
}
if (!kvm->arch.using_mmu_notifiers)
get_page(page);
offset = gpa & (psize - 1);
if (nb_ret)
*nb_ret = psize - offset;
@ -1003,7 +1008,6 @@ void kvmppc_unpin_guest_page(struct kvm *kvm, void *va)
{
struct page *page = virt_to_page(va);
page = compound_head(page);
put_page(page);
}

2
arch/powerpc/kvm/book3s_hv.c
View File

@ -1192,8 +1192,6 @@ static void unpin_slot(struct kvm *kvm, int slot_id)
continue;
pfn = physp[j] >> PAGE_SHIFT;
page = pfn_to_page(pfn);
if (PageHuge(page))
page = compound_head(page);
SetPageDirty(page);
put_page(page);
}

1
arch/powerpc/kvm/book3s_hv_rm_mmu.c
View File

@ -463,6 +463,7 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
/* insert R and C bits from PTE */
rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
args[j] |= rcbits << (56 - 5);
hp[0] = 0;
continue;
}

42
arch/powerpc/kvm/book3s_segment.S
View File

@ -197,7 +197,8 @@ kvmppc_interrupt:
/* Save guest PC and MSR */
#ifdef CONFIG_PPC64
BEGIN_FTR_SECTION
andi. r0,r12,0x2
andi. r0, r12, 0x2
cmpwi cr1, r0, 0
beq 1f
mfspr r3,SPRN_HSRR0
mfspr r4,SPRN_HSRR1
@ -250,6 +251,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
beq ld_last_prev_inst
cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT
beq- ld_last_inst
#ifdef CONFIG_PPC64
BEGIN_FTR_SECTION
cmpwi r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST
beq- ld_last_inst
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
#endif
b no_ld_last_inst
@ -316,23 +323,17 @@ no_dcbz32_off:
* Having set up SRR0/1 with the address where we want
* to continue with relocation on (potentially in module
* space), we either just go straight there with rfi[d],
* or we jump to an interrupt handler with bctr if there
* is an interrupt to be handled first. In the latter
* case, the rfi[d] at the end of the interrupt handler
* will get us back to where we want to continue.
* or we jump to an interrupt handler if there is an
* interrupt to be handled first. In the latter case,
* the rfi[d] at the end of the interrupt handler will
* get us back to where we want to continue.
*/
cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
beq 1f
cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
beq 1f
cmpwi r12, BOOK3S_INTERRUPT_PERFMON
1: mtctr r12
/* Register usage at this point:
*
* R1 = host R1
* R2 = host R2
* R10 = raw exit handler id
* R12 = exit handler id
* R13 = shadow vcpu (32-bit) or PACA (64-bit)
* SVCPU.* = guest *
@ -342,12 +343,25 @@ no_dcbz32_off:
PPC_LL r6, HSTATE_HOST_MSR(r13)
PPC_LL r8, HSTATE_VMHANDLER(r13)
/* Restore host msr -> SRR1 */
#ifdef CONFIG_PPC64
BEGIN_FTR_SECTION
beq cr1, 1f
mtspr SPRN_HSRR1, r6
mtspr SPRN_HSRR0, r8
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
#endif
1: /* Restore host msr -> SRR1 */
mtsrr1 r6
/* Load highmem handler address */
mtsrr0 r8
/* RFI into the highmem handler, or jump to interrupt handler */
beqctr
cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
beqa BOOK3S_INTERRUPT_EXTERNAL
cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
beqa BOOK3S_INTERRUPT_DECREMENTER
cmpwi r12, BOOK3S_INTERRUPT_PERFMON
beqa BOOK3S_INTERRUPT_PERFMON
RFI
kvmppc_handler_trampoline_exit_end:

2
arch/sparc/kernel/central.c
View File

@ -269,4 +269,4 @@ static int __init sunfire_init(void)
return 0;
}
subsys_initcall(sunfire_init);
fs_initcall(sunfire_init);

6
arch/sparc/mm/ultra.S
View File

@ -495,11 +495,11 @@ xcall_fetch_glob_regs:
stx %o7, [%g1 + GR_SNAP_O7]
stx %i7, [%g1 + GR_SNAP_I7]
/* Don't try this at home kids... */
rdpr %cwp, %g2
sub %g2, 1, %g7
rdpr %cwp, %g3
sub %g3, 1, %g7
wrpr %g7, %cwp
mov %i7, %g7
wrpr %g2, %cwp
wrpr %g3, %cwp
stx %g7, [%g1 + GR_SNAP_RPC]
sethi %hi(trap_block), %g7
or %g7, %lo(trap_block), %g7

1
arch/tile/Kconfig
View File

@ -11,6 +11,7 @@ config TILE
select GENERIC_IRQ_PROBE
select GENERIC_PENDING_IRQ if SMP
select GENERIC_IRQ_SHOW
select HAVE_SYSCALL_WRAPPERS if TILEGX
select SYS_HYPERVISOR
select ARCH_HAVE_NMI_SAFE_CMPXCHG

9
arch/tile/include/asm/thread_info.h
View File

@ -100,9 +100,14 @@ extern void cpu_idle_on_new_stack(struct thread_info *old_ti,
#else /* __ASSEMBLY__ */
/* how to get the thread information struct from ASM */
/*
* How to get the thread information struct from assembly.
* Note that we use different macros since different architectures
* have different semantics in their "mm" instruction and we would
* like to guarantee that the macro expands to exactly one instruction.
*/
#ifdef __tilegx__
#define GET_THREAD_INFO(reg) move reg, sp; mm reg, zero, LOG2_THREAD_SIZE, 63
#define EXTRACT_THREAD_INFO(reg) mm reg, zero, LOG2_THREAD_SIZE, 63
#else
#define GET_THREAD_INFO(reg) mm reg, sp, zero, LOG2_THREAD_SIZE, 31
#endif

12
arch/tile/kernel/compat_signal.c
View File

@ -403,19 +403,17 @@ int compat_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
* Set up registers for signal handler.
* Registers that we don't modify keep the value they had from
* user-space at the time we took the signal.
* We always pass siginfo and mcontext, regardless of SA_SIGINFO,
* since some things rely on this (e.g. glibc's debug/segfault.c).
*/
regs->pc = ptr_to_compat_reg(ka->sa.sa_handler);
regs->ex1 = PL_ICS_EX1(USER_PL, 1); /* set crit sec in handler */
regs->sp = ptr_to_compat_reg(frame);
regs->lr = restorer;
regs->regs[0] = (unsigned long) usig;
if (ka->sa.sa_flags & SA_SIGINFO) {
/* Need extra arguments, so mark to restore caller-saves. */
regs->regs[1] = ptr_to_compat_reg(&frame->info);
regs->regs[2] = ptr_to_compat_reg(&frame->uc);
regs->flags |= PT_FLAGS_CALLER_SAVES;
}
regs->regs[1] = ptr_to_compat_reg(&frame->info);
regs->regs[2] = ptr_to_compat_reg(&frame->uc);
regs->flags |= PT_FLAGS_CALLER_SAVES;
/*
* Notify any tracer that was single-stepping it.

41
arch/tile/kernel/intvec_32.S
View File

@ -838,6 +838,18 @@ STD_ENTRY(interrupt_return)
.Lresume_userspace:
FEEDBACK_REENTER(interrupt_return)
/*
* Use r33 to hold whether we have already loaded the callee-saves
* into ptregs. We don't want to do it twice in this loop, since
* then we'd clobber whatever changes are made by ptrace, etc.
* Get base of stack in r32.
*/
{
GET_THREAD_INFO(r32)
movei r33, 0
}
.Lretry_work_pending:
/*
* Disable interrupts so as to make sure we don't
* miss an interrupt that sets any of the thread flags (like
@ -848,9 +860,6 @@ STD_ENTRY(interrupt_return)
IRQ_DISABLE(r20, r21)
TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */
/* Get base of stack in r32; note r30/31 are used as arguments here. */
GET_THREAD_INFO(r32)
/* Check to see if there is any work to do before returning to user. */
{
@ -866,16 +875,18 @@ STD_ENTRY(interrupt_return)
/*
* Make sure we have all the registers saved for signal
* handling or single-step. Call out to C code to figure out
* exactly what we need to do for each flag bit, then if
* necessary, reload the flags and recheck.
* handling, notify-resume, or single-step. Call out to C
* code to figure out exactly what we need to do for each flag bit,
* then if necessary, reload the flags and recheck.
*/
push_extra_callee_saves r0
{
PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
jal do_work_pending
bnz r33, 1f
}
bnz r0, .Lresume_userspace
push_extra_callee_saves r0
movei r33, 1
1: jal do_work_pending
bnz r0, .Lretry_work_pending
/*
* In the NMI case we
@ -1180,10 +1191,12 @@ handle_syscall:
add r20, r20, tp
lw r21, r20
addi r21, r21, 1
sw r20, r21
{
sw r20, r21
GET_THREAD_INFO(r31)
}
/* Trace syscalls, if requested. */
GET_THREAD_INFO(r31)
addi r31, r31, THREAD_INFO_FLAGS_OFFSET
lw r30, r31
andi r30, r30, _TIF_SYSCALL_TRACE
@ -1362,7 +1375,10 @@ handle_ill:
3:
/* set PC and continue */
lw r26, r24
sw r28, r26
{
sw r28, r26
GET_THREAD_INFO(r0)
}
/*
* Clear TIF_SINGLESTEP to prevent recursion if we execute an ill.
@ -1370,7 +1386,6 @@ handle_ill:
* need to clear it here and can't really impose on all other arches.
* So what's another write between friends?
*/
GET_THREAD_INFO(r0)
addi r1, r0, THREAD_INFO_FLAGS_OFFSET
{

38
arch/tile/kernel/intvec_64.S
View File

@ -646,6 +646,20 @@ STD_ENTRY(interrupt_return)
.Lresume_userspace:
FEEDBACK_REENTER(interrupt_return)
/*
* Use r33 to hold whether we have already loaded the callee-saves
* into ptregs. We don't want to do it twice in this loop, since
* then we'd clobber whatever changes are made by ptrace, etc.
*/
{
movei r33, 0
move r32, sp
}
/* Get base of stack in r32. */
EXTRACT_THREAD_INFO(r32)
.Lretry_work_pending:
/*
* Disable interrupts so as to make sure we don't
* miss an interrupt that sets any of the thread flags (like
@ -656,9 +670,6 @@ STD_ENTRY(interrupt_return)
IRQ_DISABLE(r20, r21)
TRACE_IRQS_OFF /* Note: clobbers registers r0-r29 */
/* Get base of stack in r32; note r30/31 are used as arguments here. */
GET_THREAD_INFO(r32)
/* Check to see if there is any work to do before returning to user. */
{
@ -674,16 +685,18 @@ STD_ENTRY(interrupt_return)
/*
* Make sure we have all the registers saved for signal
* handling or single-step. Call out to C code to figure out
* handling or notify-resume. Call out to C code to figure out
* exactly what we need to do for each flag bit, then if
* necessary, reload the flags and recheck.
*/
push_extra_callee_saves r0
{
PTREGS_PTR(r0, PTREGS_OFFSET_BASE)
jal do_work_pending
bnez r33, 1f
}
bnez r0, .Lresume_userspace
push_extra_callee_saves r0
movei r33, 1
1: jal do_work_pending
bnez r0, .Lretry_work_pending
/*
* In the NMI case we
@ -968,11 +981,16 @@ handle_syscall:
shl16insli r20, r20, hw0(irq_stat + IRQ_CPUSTAT_SYSCALL_COUNT_OFFSET)
add r20, r20, tp
ld4s r21, r20
addi r21, r21, 1
st4 r20, r21
{
addi r21, r21, 1
move r31, sp
}
{
st4 r20, r21
EXTRACT_THREAD_INFO(r31)
}
/* Trace syscalls, if requested. */
GET_THREAD_INFO(r31)
addi r31, r31, THREAD_INFO_FLAGS_OFFSET
ld r30, r31
andi r30, r30, _TIF_SYSCALL_TRACE

7
arch/tile/kernel/process.c
View File

@ -567,6 +567,10 @@ struct task_struct *__sched _switch_to(struct task_struct *prev,
*/
int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
{
/* If we enter in kernel mode, do nothing and exit the caller loop. */
if (!user_mode(regs))
return 0;
if (thread_info_flags & _TIF_NEED_RESCHED) {
schedule();
return 1;
@ -589,8 +593,7 @@ int do_work_pending(struct pt_regs *regs, u32 thread_info_flags)
return 1;
}
if (thread_info_flags & _TIF_SINGLESTEP) {
if ((regs->ex1 & SPR_EX_CONTEXT_1_1__PL_MASK) == 0)
single_step_once(regs);
single_step_once(regs);
return 0;
}
panic("work_pending: bad flags %#x\n", thread_info_flags);

3
arch/x86/Makefile
View File

@ -134,6 +134,9 @@ KBUILD_CFLAGS += $(call cc-option,-mno-avx,)
KBUILD_CFLAGS += $(mflags-y)
KBUILD_AFLAGS += $(mflags-y)
archscripts:
$(Q)$(MAKE) $(build)=arch/x86/tools relocs
###
# Syscall table generation

9
arch/x86/boot/compressed/Makefile
View File

@ -40,13 +40,12 @@ OBJCOPYFLAGS_vmlinux.bin := -R .comment -S
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
targets += vmlinux.bin.all vmlinux.relocs
targets += vmlinux.bin.all vmlinux.relocs relocs
hostprogs-$(CONFIG_X86_NEED_RELOCS) += relocs
CMD_RELOCS = arch/x86/tools/relocs
quiet_cmd_relocs = RELOCS $@
cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $<
$(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE
cmd_relocs = $(CMD_RELOCS) $< > $@;$(CMD_RELOCS) --abs-relocs $<
$(obj)/vmlinux.relocs: vmlinux FORCE
$(call if_changed,relocs)
vmlinux.bin.all-y := $(obj)/vmlinux.bin

14
arch/x86/kernel/cpu/mcheck/mce.c
View File

@ -945,9 +945,10 @@ struct mce_info {
atomic_t inuse;
struct task_struct *t;
__u64 paddr;
int restartable;
} mce_info[MCE_INFO_MAX];
static void mce_save_info(__u64 addr)
static void mce_save_info(__u64 addr, int c)
{
struct mce_info *mi;
@ -955,6 +956,7 @@ static void mce_save_info(__u64 addr)
if (atomic_cmpxchg(&mi->inuse, 0, 1) == 0) {
mi->t = current;
mi->paddr = addr;
mi->restartable = c;
return;
}
}
@ -1130,7 +1132,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
mce_panic("Fatal machine check on current CPU", &m, msg);
if (worst == MCE_AR_SEVERITY) {
/* schedule action before return to userland */
mce_save_info(m.addr);
mce_save_info(m.addr, m.mcgstatus & MCG_STATUS_RIPV);
set_thread_flag(TIF_MCE_NOTIFY);
} else if (kill_it) {
force_sig(SIGBUS, current);
@ -1179,7 +1181,13 @@ void mce_notify_process(void)
pr_err("Uncorrected hardware memory error in user-access at %llx",
mi->paddr);
if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) < 0) {
/*
* We must call memory_failure() here even if the current process is
* doomed. We still need to mark the page as poisoned and alert any
* other users of the page.
*/
if (memory_failure(pfn, MCE_VECTOR, MF_ACTION_REQUIRED) < 0 ||
mi->restartable == 0) {
pr_err("Memory error not recovered");
force_sig(SIGBUS, current);
}

9
arch/x86/kernel/kvm.c
View File

@ -79,7 +79,6 @@ struct kvm_task_sleep_node {
u32 token;
int cpu;
bool halted;
struct mm_struct *mm;
};
static struct kvm_task_sleep_head {
@ -126,9 +125,7 @@ void kvm_async_pf_task_wait(u32 token)
n.token = token;
n.cpu = smp_processor_id();
n.mm = current->active_mm;
n.halted = idle || preempt_count() > 1;
atomic_inc(&n.mm->mm_count);
init_waitqueue_head(&n.wq);
hlist_add_head(&n.link, &b->list);
spin_unlock(&b->lock);
@ -161,9 +158,6 @@ EXPORT_SYMBOL_GPL(kvm_async_pf_task_wait);
static void apf_task_wake_one(struct kvm_task_sleep_node *n)
{
hlist_del_init(&n->link);
if (!n->mm)
return;
mmdrop(n->mm);
if (n->halted)
smp_send_reschedule(n->cpu);
else if (waitqueue_active(&n->wq))
@ -207,7 +201,7 @@ void kvm_async_pf_task_wake(u32 token)
* async PF was not yet handled.
* Add dummy entry for the token.
*/
n = kmalloc(sizeof(*n), GFP_ATOMIC);
n = kzalloc(sizeof(*n), GFP_ATOMIC);
if (!n) {
/*
* Allocation failed! Busy wait while other cpu
@ -219,7 +213,6 @@ void kvm_async_pf_task_wake(u32 token)
}
n->token = token;
n->cpu = smp_processor_id();
n->mm = NULL;
init_waitqueue_head(&n->wq);
hlist_add_head(&n->link, &b->list);
} else

14
arch/x86/kernel/setup_percpu.c
View File

@ -185,10 +185,22 @@ void __init setup_per_cpu_areas(void)
#endif
rc = -EINVAL;
if (pcpu_chosen_fc != PCPU_FC_PAGE) {
const size_t atom_size = cpu_has_pse ? PMD_SIZE : PAGE_SIZE;
const size_t dyn_size = PERCPU_MODULE_RESERVE +
PERCPU_DYNAMIC_RESERVE - PERCPU_FIRST_CHUNK_RESERVE;
size_t atom_size;
/*
* On 64bit, use PMD_SIZE for atom_size so that embedded
* percpu areas are aligned to PMD. This, in the future,
* can also allow using PMD mappings in vmalloc area. Use
* PAGE_SIZE on 32bit as vmalloc space is highly contended
* and large vmalloc area allocs can easily fail.
*/
#ifdef CONFIG_X86_64
atom_size = PMD_SIZE;
#else
atom_size = PAGE_SIZE;
#endif
rc = pcpu_embed_first_chunk(PERCPU_FIRST_CHUNK_RESERVE,
dyn_size, atom_size,
pcpu_cpu_distance,

1
arch/x86/kvm/x86.c
View File

@ -6581,6 +6581,7 @@ void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
kvm_inject_page_fault(vcpu, &fault);
}
vcpu->arch.apf.halted = false;
vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
}
bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)

1
arch/x86/tools/.gitignore vendored Normal file
View File

@ -0,0 +1 @@
relocs

4
arch/x86/tools/Makefile
View File

@ -36,3 +36,7 @@ HOSTCFLAGS_insn_sanity.o := -Wall -I$(objtree)/arch/x86/lib/ -I$(srctree)/arch/x
$(obj)/test_get_len.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
$(obj)/insn_sanity.o: $(srctree)/arch/x86/lib/insn.c $(srctree)/arch/x86/lib/inat.c $(srctree)/arch/x86/include/asm/inat_types.h $(srctree)/arch/x86/include/asm/inat.h $(srctree)/arch/x86/include/asm/insn.h $(objtree)/arch/x86/lib/inat-tables.c
HOST_EXTRACFLAGS += -I$(srctree)/tools/include
hostprogs-y += relocs
relocs: $(obj)/relocs

242
arch/x86/boot/compressed/relocs.c → arch/x86/tools/relocs.c
View File

@ -18,6 +18,8 @@ static void die(char *fmt, ...);
static Elf32_Ehdr ehdr;
static unsigned long reloc_count, reloc_idx;
static unsigned long *relocs;
static unsigned long reloc16_count, reloc16_idx;
static unsigned long *relocs16;
struct section {
Elf32_Shdr shdr;
@ -28,52 +30,86 @@ struct section {
};
static struct section *secs;
enum symtype {
S_ABS,
S_REL,
S_SEG,
S_LIN,
S_NSYMTYPES
};
static const char * const sym_regex_kernel[S_NSYMTYPES] = {
/*
* Following symbols have been audited. There values are constant and do
* not change if bzImage is loaded at a different physical address than
* the address for which it has been compiled. Don't warn user about
* absolute relocations present w.r.t these symbols.
*/
static const char abs_sym_regex[] =
[S_ABS] =
"^(xen_irq_disable_direct_reloc$|"
"xen_save_fl_direct_reloc$|"
"VDSO|"
"__crc_)";
static regex_t abs_sym_regex_c;
static int is_abs_reloc(const char *sym_name)
{
return !regexec(&abs_sym_regex_c, sym_name, 0, NULL, 0);
}
"__crc_)",
/*
* These symbols are known to be relative, even if the linker marks them
* as absolute (typically defined outside any section in the linker script.)
*/
static const char rel_sym_regex[] =
"^_end$";
static regex_t rel_sym_regex_c;
static int is_rel_reloc(const char *sym_name)
[S_REL] =
"^(__init_(begin|end)|"
"__x86_cpu_dev_(start|end)|"
"(__parainstructions|__alt_instructions)(|_end)|"
"(__iommu_table|__apicdrivers|__smp_locks)(|_end)|"
"_end)$"
};
static const char * const sym_regex_realmode[S_NSYMTYPES] = {
/*
* These are 16-bit segment symbols when compiling 16-bit code.
*/
[S_SEG] =
"^real_mode_seg$",
/*
* These are offsets belonging to segments, as opposed to linear addresses,
* when compiling 16-bit code.
*/
[S_LIN] =
"^pa_",
};
static const char * const *sym_regex;
static regex_t sym_regex_c[S_NSYMTYPES];
static int is_reloc(enum symtype type, const char *sym_name)
{
return !regexec(&rel_sym_regex_c, sym_name, 0, NULL, 0);
return sym_regex[type] &&
!regexec(&sym_regex_c[type], sym_name, 0, NULL, 0);
}
static void regex_init(void)
static void regex_init(int use_real_mode)
{
char errbuf[128];
int err;
err = regcomp(&abs_sym_regex_c, abs_sym_regex,
REG_EXTENDED|REG_NOSUB);
if (err) {
regerror(err, &abs_sym_regex_c, errbuf, sizeof errbuf);
die("%s", errbuf);
}
int i;
err = regcomp(&rel_sym_regex_c, rel_sym_regex,
REG_EXTENDED|REG_NOSUB);
if (err) {
regerror(err, &rel_sym_regex_c, errbuf, sizeof errbuf);
die("%s", errbuf);
if (use_real_mode)
sym_regex = sym_regex_realmode;
else
sym_regex = sym_regex_kernel;
for (i = 0; i < S_NSYMTYPES; i++) {
if (!sym_regex[i])
continue;
err = regcomp(&sym_regex_c[i], sym_regex[i],
REG_EXTENDED|REG_NOSUB);
if (err) {
regerror(err, &sym_regex_c[i], errbuf, sizeof errbuf);
die("%s", errbuf);
}
}
}
@ -154,6 +190,10 @@ static const char *rel_type(unsigned type)
REL_TYPE(R_386_RELATIVE),
REL_TYPE(R_386_GOTOFF),
REL_TYPE(R_386_GOTPC),
REL_TYPE(R_386_8),
REL_TYPE(R_386_PC8),
REL_TYPE(R_386_16),
REL_TYPE(R_386_PC16),
#undef REL_TYPE
};
const char *name = "unknown type rel type name";
@ -189,7 +229,7 @@ static const char *sym_name(const char *sym_strtab, Elf32_Sym *sym)
name = sym_strtab + sym->st_name;
}
else {
name = sec_name(secs[sym->st_shndx].shdr.sh_name);
name = sec_name(sym->st_shndx);
}
return name;
}
@ -472,7 +512,7 @@ static void print_absolute_relocs(void)
* Before warning check if this absolute symbol
* relocation is harmless.
*/
if (is_abs_reloc(name) || is_rel_reloc(name))
if (is_reloc(S_ABS, name) || is_reloc(S_REL, name))
continue;
if (!printed) {
@ -496,7 +536,8 @@ static void print_absolute_relocs(void)
printf("\n");
}
static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym),
int use_real_mode)
{
int i;
/* Walk through the relocations */
@ -521,30 +562,67 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
Elf32_Rel *rel;
Elf32_Sym *sym;
unsigned r_type;
const char *symname;
int shn_abs;
rel = &sec->reltab[j];
sym = &sh_symtab[ELF32_R_SYM(rel->r_info)];
r_type = ELF32_R_TYPE(rel->r_info);
/* Don't visit relocations to absolute symbols */
if (sym->st_shndx == SHN_ABS &&
!is_rel_reloc(sym_name(sym_strtab, sym))) {
continue;
}
shn_abs = sym->st_shndx == SHN_ABS;
switch (r_type) {
case R_386_NONE:
case R_386_PC32:
case R_386_PC16:
case R_386_PC8:
/*
* NONE can be ignored and and PC relative
* relocations don't need to be adjusted.
*/
break;
case R_386_16:
symname = sym_name(sym_strtab, sym);
if (!use_real_mode)
goto bad;
if (shn_abs) {
if (is_reloc(S_ABS, symname))
break;
else if (!is_reloc(S_SEG, symname))
goto bad;
} else {
if (is_reloc(S_LIN, symname))
goto bad;
else
break;
}
visit(rel, sym);
break;
case R_386_32:
/* Visit relocations that need to be adjusted */
symname = sym_name(sym_strtab, sym);
if (shn_abs) {
if (is_reloc(S_ABS, symname))
break;
else if (!is_reloc(S_REL, symname))
goto bad;
} else {
if (use_real_mode &&
!is_reloc(S_LIN, symname))
break;
}
visit(rel, sym);
break;
default:
die("Unsupported relocation type: %s (%d)\n",
rel_type(r_type), r_type);
break;
bad:
symname = sym_name(sym_strtab, sym);
die("Invalid %s %s relocation: %s\n",
shn_abs ? "absolute" : "relative",
rel_type(r_type), symname);
}
}
}
@ -552,13 +630,19 @@ static void walk_relocs(void (*visit)(Elf32_Rel *rel, Elf32_Sym *sym))
static void count_reloc(Elf32_Rel *rel, Elf32_Sym *sym)
{
reloc_count += 1;
if (ELF32_R_TYPE(rel->r_info) == R_386_16)
reloc16_count++;
else
reloc_count++;
}
static void collect_reloc(Elf32_Rel *rel, Elf32_Sym *sym)
{
/* Remember the address that needs to be adjusted. */
relocs[reloc_idx++] = rel->r_offset;
if (ELF32_R_TYPE(rel->r_info) == R_386_16)
relocs16[reloc16_idx++] = rel->r_offset;
else
relocs[reloc_idx++] = rel->r_offset;
}
static int cmp_relocs(const void *va, const void *vb)
@ -568,23 +652,41 @@ static int cmp_relocs(const void *va, const void *vb)
return (*a == *b)? 0 : (*a > *b)? 1 : -1;
}
static void emit_relocs(int as_text)
static int write32(unsigned int v, FILE *f)
{
unsigned char buf[4];
put_unaligned_le32(v, buf);
return fwrite(buf, 1, 4, f) == 4 ? 0 : -1;
}
static void emit_relocs(int as_text, int use_real_mode)
{
int i;
/* Count how many relocations I have and allocate space for them. */
reloc_count = 0;
walk_relocs(count_reloc);
walk_relocs(count_reloc, use_real_mode);
relocs = malloc(reloc_count * sizeof(relocs[0]));
if (!relocs) {
die("malloc of %d entries for relocs failed\n",
reloc_count);
}
relocs16 = malloc(reloc16_count * sizeof(relocs[0]));
if (!relocs16) {
die("malloc of %d entries for relocs16 failed\n",
reloc16_count);
}
/* Collect up the relocations */
reloc_idx = 0;
walk_relocs(collect_reloc);
walk_relocs(collect_reloc, use_real_mode);
if (reloc16_count && !use_real_mode)
die("Segment relocations found but --realmode not specified\n");
/* Order the relocations for more efficient processing */
qsort(relocs, reloc_count, sizeof(relocs[0]), cmp_relocs);
qsort(relocs16, reloc16_count, sizeof(relocs16[0]), cmp_relocs);
/* Print the relocations */
if (as_text) {
@ -593,58 +695,83 @@ static void emit_relocs(int as_text)
*/
printf(".section \".data.reloc\",\"a\"\n");
printf(".balign 4\n");
for (i = 0; i < reloc_count; i++) {
printf("\t .long 0x%08lx\n", relocs[i]);
if (use_real_mode) {
printf("\t.long %lu\n", reloc16_count);
for (i = 0; i < reloc16_count; i++)
printf("\t.long 0x%08lx\n", relocs16[i]);
printf("\t.long %lu\n", reloc_count);
for (i = 0; i < reloc_count; i++) {
printf("\t.long 0x%08lx\n", relocs[i]);
}
} else {
/* Print a stop */
printf("\t.long 0x%08lx\n", (unsigned long)0);
for (i = 0; i < reloc_count; i++) {
printf("\t.long 0x%08lx\n", relocs[i]);
}
}
printf("\n");
}
else {
unsigned char buf[4];
/* Print a stop */
fwrite("\0\0\0\0", 4, 1, stdout);
/* Now print each relocation */
for (i = 0; i < reloc_count; i++) {
put_unaligned_le32(relocs[i], buf);
fwrite(buf, 4, 1, stdout);
if (use_real_mode) {
write32(reloc16_count, stdout);
for (i = 0; i < reloc16_count; i++)
write32(relocs16[i], stdout);
write32(reloc_count, stdout);
/* Now print each relocation */
for (i = 0; i < reloc_count; i++)
write32(relocs[i], stdout);
} else {
/* Print a stop */
write32(0, stdout);
/* Now print each relocation */
for (i = 0; i < reloc_count; i++) {
write32(relocs[i], stdout);
}
}
}
}
static void usage(void)
{
die("relocs [--abs-syms |--abs-relocs | --text] vmlinux\n");
die("relocs [--abs-syms|--abs-relocs|--text|--realmode] vmlinux\n");
}
int main(int argc, char **argv)
{
int show_absolute_syms, show_absolute_relocs;
int as_text;
int as_text, use_real_mode;
const char *fname;
FILE *fp;
int i;
regex_init();
show_absolute_syms = 0;
show_absolute_relocs = 0;
as_text = 0;
use_real_mode = 0;
fname = NULL;
for (i = 1; i < argc; i++) {
char *arg = argv[i];
if (*arg == '-') {
if (strcmp(argv[1], "--abs-syms") == 0) {
if (strcmp(arg, "--abs-syms") == 0) {
show_absolute_syms = 1;
continue;
}
if (strcmp(argv[1], "--abs-relocs") == 0) {
if (strcmp(arg, "--abs-relocs") == 0) {
show_absolute_relocs = 1;
continue;
}
else if (strcmp(argv[1], "--text") == 0) {
if (strcmp(arg, "--text") == 0) {
as_text = 1;
continue;
}
if (strcmp(arg, "--realmode") == 0) {
use_real_mode = 1;
continue;
}
}
else if (!fname) {
fname = arg;
@ -655,6 +782,7 @@ int main(int argc, char **argv)
if (!fname) {
usage();
}
regex_init(use_real_mode);
fp = fopen(fname, "r");
if (!fp) {
die("Cannot open %s: %s\n",
@ -673,6 +801,6 @@ int main(int argc, char **argv)
print_absolute_relocs();
return 0;
}
emit_relocs(as_text);
emit_relocs(as_text, use_real_mode);
return 0;
}

42
arch/x86/xen/enlighten.c
View File

@ -63,6 +63,7 @@
#include <asm/stackprotector.h>
#include <asm/hypervisor.h>
#include <asm/mwait.h>
#include <asm/pci_x86.h>
#ifdef CONFIG_ACPI
#include <linux/acpi.h>
@ -809,9 +810,40 @@ static void xen_io_delay(void)
}
#ifdef CONFIG_X86_LOCAL_APIC
static unsigned long xen_set_apic_id(unsigned int x)
{
WARN_ON(1);
return x;
}
static unsigned int xen_get_apic_id(unsigned long x)
{
return ((x)>>24) & 0xFFu;
}
static u32 xen_apic_read(u32 reg)
{
return 0;
struct xen_platform_op op = {
.cmd = XENPF_get_cpuinfo,
.interface_version = XENPF_INTERFACE_VERSION,
.u.pcpu_info.xen_cpuid = 0,
};
int ret = 0;
/* Shouldn't need this as APIC is turned off for PV, and we only
* get called on the bootup processor. But just in case. */
if (!xen_initial_domain() || smp_processor_id())
return 0;
if (reg == APIC_LVR)
return 0x10;
if (reg != APIC_ID)
return 0;
ret = HYPERVISOR_dom0_op(&op);
if (ret)
return 0;
return op.u.pcpu_info.apic_id << 24;
}
static void xen_apic_write(u32 reg, u32 val)
@ -849,6 +881,8 @@ static void set_xen_basic_apic_ops(void)
apic->icr_write = xen_apic_icr_write;
apic->wait_icr_idle = xen_apic_wait_icr_idle;
apic->safe_wait_icr_idle = xen_safe_apic_wait_icr_idle;
apic->set_apic_id = xen_set_apic_id;
apic->get_apic_id = xen_get_apic_id;
}
#endif
@ -1365,8 +1399,10 @@ asmlinkage void __init xen_start_kernel(void)
/* Make sure ACS will be enabled */
pci_request_acs();
}
#ifdef CONFIG_PCI
/* PCI BIOS service won't work from a PV guest. */
pci_probe &= ~PCI_PROBE_BIOS;
#endif
xen_raw_console_write("about to get started...\n");
xen_setup_runstate_info(0);

7
arch/x86/xen/mmu.c
View File

@ -353,8 +353,13 @@ static pteval_t pte_mfn_to_pfn(pteval_t val)
{
if (val & _PAGE_PRESENT) {
unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
unsigned long pfn = mfn_to_pfn(mfn);
pteval_t flags = val & PTE_FLAGS_MASK;
val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
if (unlikely(pfn == ~0))
val = flags & ~_PAGE_PRESENT;
else
val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
}
return val;

10
block/genhd.c
View File

@ -743,7 +743,7 @@ void __init printk_all_partitions(void)
struct hd_struct *part;
char name_buf[BDEVNAME_SIZE];
char devt_buf[BDEVT_SIZE];
u8 uuid[PARTITION_META_INFO_UUIDLTH * 2 + 1];
char uuid_buf[PARTITION_META_INFO_UUIDLTH * 2 + 5];
/*
* Don't show empty devices or things that have been
@ -762,14 +762,16 @@ void __init printk_all_partitions(void)
while ((part = disk_part_iter_next(&piter))) {
bool is_part0 = part == &disk->part0;
uuid[0] = 0;
uuid_buf[0] = '\0';
if (part->info)
part_unpack_uuid(part->info->uuid, uuid);
snprintf(uuid_buf, sizeof(uuid_buf), "%pU",
part->info->uuid);
printk("%s%s %10llu %s %s", is_part0 ? "" : " ",
bdevt_str(part_devt(part), devt_buf),
(unsigned long long)part->nr_sects >> 1,
disk_name(disk, part->partno, name_buf), uuid);
disk_name(disk, part->partno, name_buf),
uuid_buf);
if (is_part0) {
if (disk->driverfs_dev != NULL &&
disk->driverfs_dev->driver != NULL)

4
drivers/acpi/bus.c
View File

@ -250,6 +250,10 @@ static int __acpi_bus_set_power(struct acpi_device *device, int state)
return -ENODEV;
}
/* For D3cold we should execute _PS3, not _PS4. */
if (state == ACPI_STATE_D3_COLD)
object_name[3] = '3';
/*
* Transition Power
* ----------------

9
drivers/acpi/power.c
View File

@ -660,7 +660,7 @@ int acpi_power_on_resources(struct acpi_device *device, int state)
int acpi_power_transition(struct acpi_device *device, int state)
{
int result;
int result = 0;
if (!device || (state < ACPI_STATE_D0) || (state > ACPI_STATE_D3_COLD))
return -EINVAL;
@ -679,8 +679,11 @@ int acpi_power_transition(struct acpi_device *device, int state)
* (e.g. so the device doesn't lose power while transitioning). Then,
* we dereference all power resources used in the current list.
*/
result = acpi_power_on_list(&device->power.states[state].resources);
if (!result)
if (state < ACPI_STATE_D3_COLD)
result = acpi_power_on_list(
&device->power.states[state].resources);
if (!result && device->power.state < ACPI_STATE_D3_COLD)
acpi_power_off_list(
&device->power.states[device->power.state].resources);

4
drivers/acpi/scan.c
View File

@ -908,6 +908,10 @@ static int acpi_bus_get_power_flags(struct acpi_device *device)
device->power.states[ACPI_STATE_D3].flags.valid = 1;
device->power.states[ACPI_STATE_D3].power = 0;
/* Set D3cold's explicit_set flag if _PS3 exists. */
if (device->power.states[ACPI_STATE_D3_HOT].flags.explicit_set)
device->power.states[ACPI_STATE_D3_COLD].flags.explicit_set = 1;
acpi_bus_init_power(device);
return 0;

4
drivers/base/regmap/regmap.c
View File

@ -775,9 +775,11 @@ int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
map->format.parse_val(val + i);
} else {
for (i = 0; i < val_count; i++) {
ret = regmap_read(map, reg + i, val + (i * val_bytes));
unsigned int ival;
ret = regmap_read(map, reg + i, &ival);
if (ret != 0)
return ret;
memcpy(val + (i * val_bytes), &ival, val_bytes);
}
}

23
drivers/block/DAC960.c
View File

@ -6580,24 +6580,21 @@ static const struct file_operations dac960_user_command_proc_fops = {
static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
{
struct proc_dir_entry *StatusProcEntry;
struct proc_dir_entry *ControllerProcEntry;
struct proc_dir_entry *UserCommandProcEntry;
if (DAC960_ProcDirectoryEntry == NULL) {
DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
StatusProcEntry = proc_create("status", 0,
DAC960_ProcDirectoryEntry,
&dac960_proc_fops);
DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
proc_create("status", 0, DAC960_ProcDirectoryEntry,
&dac960_proc_fops);
}
sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
ControllerProcEntry = proc_mkdir(Controller->ControllerName,
DAC960_ProcDirectoryEntry);
proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
UserCommandProcEntry = proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
Controller->ControllerProcEntry = ControllerProcEntry;
sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
ControllerProcEntry = proc_mkdir(Controller->ControllerName,
DAC960_ProcDirectoryEntry);
proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
Controller->ControllerProcEntry = ControllerProcEntry;
}

2
drivers/block/drbd/drbd_nl.c
View File

@ -2297,7 +2297,7 @@ static void drbd_connector_callback(struct cn_msg *req, struct netlink_skb_parms
return;
}
if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) {
if (!capable(CAP_SYS_ADMIN)) {
retcode = ERR_PERM;
goto fail;
}

4
drivers/block/mtip32xx/mtip32xx.c
View File

@ -2510,8 +2510,10 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
up(&dd->port->cmd_slot);
return NULL;
}
if (unlikely(*tag < 0))
if (unlikely(*tag < 0)) {
up(&dd->port->cmd_slot);
return NULL;
}
return dd->port->commands[*tag].sg;
}

7
drivers/char/virtio_console.c
View File

@ -1895,6 +1895,13 @@ static int virtcons_restore(struct virtio_device *vdev)
/* Get port open/close status on the host */
send_control_msg(port, VIRTIO_CONSOLE_PORT_READY, 1);
/*
* If a port was open at the time of suspending, we
* have to let the host know that it's still open.
*/
if (port->guest_connected)
send_control_msg(port, VIRTIO_CONSOLE_PORT_OPEN, 1);
}
return 0;
}

1
drivers/crypto/Kconfig
View File

@ -164,6 +164,7 @@ config CRYPTO_DEV_MV_CESA
select CRYPTO_ALGAPI
select CRYPTO_AES
select CRYPTO_BLKCIPHER2
select CRYPTO_HASH
help
This driver allows you to utilize the Cryptographic Engines and
Security Accelerator (CESA) which can be found on the Marvell Orion

4
drivers/dma/at_hdmac.c
View File

@ -245,7 +245,9 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
dev_vdbg(chan2dev(&atchan->chan_common),
"descriptor %u complete\n", txd->cookie);
dma_cookie_complete(txd);
/* mark the descriptor as complete for non cyclic cases only */
if (!atc_chan_is_cyclic(atchan))
dma_cookie_complete(txd);
/* move children to free_list */
list_splice_init(&desc->tx_list, &atchan->free_list);

4
drivers/dma/ep93xx_dma.c
View File

@ -703,7 +703,9 @@ static void ep93xx_dma_tasklet(unsigned long data)
desc = ep93xx_dma_get_active(edmac);
if (desc) {
if (desc->complete) {
dma_cookie_complete(&desc->txd);
/* mark descriptor complete for non cyclic case only */
if (!test_bit(EP93XX_DMA_IS_CYCLIC, &edmac->flags))
dma_cookie_complete(&desc->txd);
list_splice_init(&edmac->active, &list);
}
callback = desc->txd.callback;

3
drivers/dma/pl330.c
View File

@ -2322,7 +2322,8 @@ static void pl330_tasklet(unsigned long data)
/* Pick up ripe tomatoes */
list_for_each_entry_safe(desc, _dt, &pch->work_list, node)
if (desc->status == DONE) {
dma_cookie_complete(&desc->txd);
if (pch->cyclic)
dma_cookie_complete(&desc->txd);
list_move_tail(&desc->node, &list);
}

9
drivers/gpio/gpio-omap.c
View File

@ -965,18 +965,15 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
}
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->irqenable_inv);
_gpio_rmw(base, bank->regs->irqstatus, l,
bank->regs->irqenable_inv == false);
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->debounce_en != 0);
_gpio_rmw(base, bank->regs->irqenable, l, bank->regs->ctrl != 0);
_gpio_rmw(base, bank->regs->irqstatus, l, !bank->regs->irqenable_inv);
if (bank->regs->debounce_en)
_gpio_rmw(base, bank->regs->debounce_en, 0, 1);
__raw_writel(0, base + bank->regs->debounce_en);
/* Save OE default value (0xffffffff) in the context */
bank->context.oe = __raw_readl(bank->base + bank->regs->direction);
/* Initialize interface clk ungated, module enabled */
if (bank->regs->ctrl)
_gpio_rmw(base, bank->regs->ctrl, 0, 1);
__raw_writel(0, base + bank->regs->ctrl);
}
static __devinit void

57
drivers/gpio/gpio-pch.c
View File

@ -230,16 +230,12 @@ static void pch_gpio_setup(struct pch_gpio *chip)
static int pch_irq_type(struct irq_data *d, unsigned int type)
{
u32 im;
u32 __iomem *im_reg;
u32 ien;
u32 im_pos;
int ch;
unsigned long flags;
u32 val;
int irq = d->irq;
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct pch_gpio *chip = gc->private;
u32 im, im_pos, val;
u32 __iomem *im_reg;
unsigned long flags;
int ch, irq = d->irq;
ch = irq - chip->irq_base;
if (irq <= chip->irq_base + 7) {
@ -270,30 +266,22 @@ static int pch_irq_type(struct irq_data *d, unsigned int type)
case IRQ_TYPE_LEVEL_LOW:
val = PCH_LEVEL_L;
break;
case IRQ_TYPE_PROBE:
goto end;
default:
dev_warn(chip->dev, "%s: unknown type(%dd)",
__func__, type);
goto end;
goto unlock;
}
/* Set interrupt mode */
im = ioread32(im_reg) & ~(PCH_IM_MASK << (im_pos * 4));
iowrite32(im | (val << (im_pos * 4)), im_reg);
/* iclr */
iowrite32(BIT(ch), &chip->reg->iclr);
/* And the handler */
if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
__irq_set_handler_locked(d->irq, handle_level_irq);
else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
__irq_set_handler_locked(d->irq, handle_edge_irq);
/* IMASKCLR */
iowrite32(BIT(ch), &chip->reg->imaskclr);
/* Enable interrupt */
ien = ioread32(&chip->reg->ien);
iowrite32(ien | BIT(ch), &chip->reg->ien);
end:
unlock:
spin_unlock_irqrestore(&chip->spinlock, flags);
return 0;
}
@ -313,18 +301,24 @@ static void pch_irq_mask(struct irq_data *d)
iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->imask);
}
static void pch_irq_ack(struct irq_data *d)
{
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct pch_gpio *chip = gc->private;
iowrite32(1 << (d->irq - chip->irq_base), &chip->reg->iclr);
}
static irqreturn_t pch_gpio_handler(int irq, void *dev_id)
{
struct pch_gpio *chip = dev_id;
u32 reg_val = ioread32(&chip->reg->istatus);
int i;
int ret = IRQ_NONE;
int i, ret = IRQ_NONE;
for (i = 0; i < gpio_pins[chip->ioh]; i++) {
if (reg_val & BIT(i)) {
dev_dbg(chip->dev, "%s:[%d]:irq=%d status=0x%x\n",
__func__, i, irq, reg_val);
iowrite32(BIT(i), &chip->reg->iclr);
generic_handle_irq(chip->irq_base + i);
ret = IRQ_HANDLED;
}
@ -343,6 +337,7 @@ static __devinit void pch_gpio_alloc_generic_chip(struct pch_gpio *chip,
gc->private = chip;
ct = gc->chip_types;
ct->chip.irq_ack = pch_irq_ack;
ct->chip.irq_mask = pch_irq_mask;
ct->chip.irq_unmask = pch_irq_unmask;
ct->chip.irq_set_type = pch_irq_type;
@ -357,6 +352,7 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,
s32 ret;
struct pch_gpio *chip;
int irq_base;
u32 msk;
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
if (chip == NULL)
@ -408,8 +404,13 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,
}
chip->irq_base = irq_base;
/* Mask all interrupts, but enable them */
msk = (1 << gpio_pins[chip->ioh]) - 1;
iowrite32(msk, &chip->reg->imask);
iowrite32(msk, &chip->reg->ien);
ret = request_irq(pdev->irq, pch_gpio_handler,
IRQF_SHARED, KBUILD_MODNAME, chip);
IRQF_SHARED, KBUILD_MODNAME, chip);
if (ret != 0) {
dev_err(&pdev->dev,
"%s request_irq failed\n", __func__);
@ -418,8 +419,6 @@ static int __devinit pch_gpio_probe(struct pci_dev *pdev,
pch_gpio_alloc_generic_chip(chip, irq_base, gpio_pins[chip->ioh]);
/* Initialize interrupt ien register */
iowrite32(0, &chip->reg->ien);
end:
return 0;

18
drivers/gpio/gpio-samsung.c
View File

@ -452,12 +452,14 @@ static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = {
};
#endif
#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5)
static struct samsung_gpio_cfg exynos_gpio_cfg = {
.set_pull = exynos_gpio_setpull,
.get_pull = exynos_gpio_getpull,
.set_config = samsung_gpio_setcfg_4bit,
.get_config = samsung_gpio_getcfg_4bit,
};
#endif
#if defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450)
static struct samsung_gpio_cfg s5p64x0_gpio_cfg_rbank = {
@ -2123,8 +2125,8 @@ static struct samsung_gpio_chip s5pv210_gpios_4bit[] = {
* uses the above macro and depends on the banks being listed in order here.
*/
static struct samsung_gpio_chip exynos4_gpios_1[] = {
#ifdef CONFIG_ARCH_EXYNOS4
static struct samsung_gpio_chip exynos4_gpios_1[] = {
{
.chip = {
.base = EXYNOS4_GPA0(0),
@ -2222,11 +2224,11 @@ static struct samsung_gpio_chip exynos4_gpios_1[] = {
.label = "GPF3",
},
},
#endif
};
#endif
static struct samsung_gpio_chip exynos4_gpios_2[] = {
#ifdef CONFIG_ARCH_EXYNOS4
static struct samsung_gpio_chip exynos4_gpios_2[] = {
{
.chip = {
.base = EXYNOS4_GPJ0(0),
@ -2367,11 +2369,11 @@ static struct samsung_gpio_chip exynos4_gpios_2[] = {
.to_irq = samsung_gpiolib_to_irq,
},
},
#endif
};
#endif
static struct samsung_gpio_chip exynos4_gpios_3[] = {
#ifdef CONFIG_ARCH_EXYNOS4
static struct samsung_gpio_chip exynos4_gpios_3[] = {
{
.chip = {
.base = EXYNOS4_GPZ(0),
@ -2379,8 +2381,8 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
.label = "GPZ",
},
},
#endif
};
#endif
#ifdef CONFIG_ARCH_EXYNOS5
static struct samsung_gpio_chip exynos5_gpios_1[] = {
@ -2719,7 +2721,9 @@ static __init int samsung_gpiolib_init(void)
{
struct samsung_gpio_chip *chip;
int i, nr_chips;
#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS5250)
void __iomem *gpio_base1, *gpio_base2, *gpio_base3, *gpio_base4;
#endif
int group = 0;
samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs));
@ -2971,6 +2975,7 @@ static __init int samsung_gpiolib_init(void)
return 0;
#if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS5250)
err_ioremap4:
iounmap(gpio_base3);
err_ioremap3:
@ -2979,6 +2984,7 @@ static __init int samsung_gpiolib_init(void)
iounmap(gpio_base1);
err_ioremap1:
return -ENOMEM;
#endif
}
core_initcall(samsung_gpiolib_init);

9
drivers/gpu/drm/i915/intel_ringbuffer.c
View File

@ -398,10 +398,8 @@ static int init_render_ring(struct intel_ring_buffer *ring)
return ret;
}
if (INTEL_INFO(dev)->gen >= 6) {
I915_WRITE(INSTPM,
INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING);
if (IS_GEN6(dev)) {
/* From the Sandybridge PRM, volume 1 part 3, page 24:
* "If this bit is set, STCunit will have LRA as replacement
* policy. [...] This bit must be reset. LRA replacement
@ -411,6 +409,11 @@ static int init_render_ring(struct intel_ring_buffer *ring)
CM0_STC_EVICT_DISABLE_LRA_SNB << CM0_MASK_SHIFT);
}
if (INTEL_INFO(dev)->gen >= 6) {
I915_WRITE(INSTPM,
INSTPM_FORCE_ORDERING << 16 | INSTPM_FORCE_ORDERING);
}
return ret;
}

6
drivers/gpu/drm/i915/intel_sdvo.c
View File

@ -1220,8 +1220,14 @@ static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct in
static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
{
struct drm_device *dev = intel_sdvo->base.base.dev;
u8 response[2];
/* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
* on the line. */
if (IS_I945G(dev) || IS_I945GM(dev))
return false;
return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
&response, 2) && response[0];
}

199
drivers/gpu/drm/nouveau/nouveau_i2c.c
View File

@ -29,10 +29,6 @@
#include "nouveau_i2c.h"
#include "nouveau_hw.h"
#define T_TIMEOUT 2200000
#define T_RISEFALL 1000
#define T_HOLD 5000
static void
i2c_drive_scl(void *data, int state)
{
@ -113,175 +109,6 @@ i2c_sense_sda(void *data)
return 0;
}
static void
i2c_delay(struct nouveau_i2c_chan *port, u32 nsec)
{
udelay((nsec + 500) / 1000);
}
static bool
i2c_raise_scl(struct nouveau_i2c_chan *port)
{
u32 timeout = T_TIMEOUT / T_RISEFALL;
i2c_drive_scl(port, 1);
do {
i2c_delay(port, T_RISEFALL);
} while (!i2c_sense_scl(port) && --timeout);
return timeout != 0;
}
static int
i2c_start(struct nouveau_i2c_chan *port)
{
int ret = 0;
port->state = i2c_sense_scl(port);
port->state |= i2c_sense_sda(port) << 1;
if (port->state != 3) {
i2c_drive_scl(port, 0);
i2c_drive_sda(port, 1);
if (!i2c_raise_scl(port))
ret = -EBUSY;
}
i2c_drive_sda(port, 0);
i2c_delay(port, T_HOLD);
i2c_drive_scl(port, 0);
i2c_delay(port, T_HOLD);
return ret;
}
static void
i2c_stop(struct nouveau_i2c_chan *port)
{
i2c_drive_scl(port, 0);
i2c_drive_sda(port, 0);
i2c_delay(port, T_RISEFALL);
i2c_drive_scl(port, 1);
i2c_delay(port, T_HOLD);
i2c_drive_sda(port, 1);
i2c_delay(port, T_HOLD);
}
static int
i2c_bitw(struct nouveau_i2c_chan *port, int sda)
{
i2c_drive_sda(port, sda);
i2c_delay(port, T_RISEFALL);
if (!i2c_raise_scl(port))
return -ETIMEDOUT;
i2c_delay(port, T_HOLD);
i2c_drive_scl(port, 0);
i2c_delay(port, T_HOLD);
return 0;
}
static int
i2c_bitr(struct nouveau_i2c_chan *port)
{
int sda;
i2c_drive_sda(port, 1);
i2c_delay(port, T_RISEFALL);
if (!i2c_raise_scl(port))
return -ETIMEDOUT;
i2c_delay(port, T_HOLD);
sda = i2c_sense_sda(port);
i2c_drive_scl(port, 0);
i2c_delay(port, T_HOLD);
return sda;
}
static int
i2c_get_byte(struct nouveau_i2c_chan *port, u8 *byte, bool last)
{
int i, bit;
*byte = 0;
for (i = 7; i >= 0; i--) {
bit = i2c_bitr(port);
if (bit < 0)
return bit;
*byte |= bit << i;
}
return i2c_bitw(port, last ? 1 : 0);
}
static int
i2c_put_byte(struct nouveau_i2c_chan *port, u8 byte)
{
int i, ret;
for (i = 7; i >= 0; i--) {
ret = i2c_bitw(port, !!(byte & (1 << i)));
if (ret < 0)
return ret;
}
ret = i2c_bitr(port);
if (ret == 1) /* nack */
ret = -EIO;
return ret;
}
static int
i2c_addr(struct nouveau_i2c_chan *port, struct i2c_msg *msg)
{
u32 addr = msg->addr << 1;
if (msg->flags & I2C_M_RD)
addr |= 1;
return i2c_put_byte(port, addr);
}
static int
i2c_bit_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
{
struct nouveau_i2c_chan *port = (struct nouveau_i2c_chan *)adap;
struct i2c_msg *msg = msgs;
int ret = 0, mcnt = num;
while (!ret && mcnt--) {
u8 remaining = msg->len;
u8 *ptr = msg->buf;
ret = i2c_start(port);
if (ret == 0)
ret = i2c_addr(port, msg);
if (msg->flags & I2C_M_RD) {
while (!ret && remaining--)
ret = i2c_get_byte(port, ptr++, !remaining);
} else {
while (!ret && remaining--)
ret = i2c_put_byte(port, *ptr++);
}
msg++;
}
i2c_stop(port);
return (ret < 0) ? ret : num;
}
static u32
i2c_bit_func(struct i2c_adapter *adap)
{
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}
const struct i2c_algorithm nouveau_i2c_bit_algo = {
.master_xfer = i2c_bit_xfer,
.functionality = i2c_bit_func
};
static const uint32_t nv50_i2c_port[] = {
0x00e138, 0x00e150, 0x00e168, 0x00e180,
0x00e254, 0x00e274, 0x00e764, 0x00e780,
@ -384,12 +211,10 @@ nouveau_i2c_init(struct drm_device *dev)
case 0: /* NV04:NV50 */
port->drive = entry[0];
port->sense = entry[1];
port->adapter.algo = &nouveau_i2c_bit_algo;
break;
case 4: /* NV4E */
port->drive = 0x600800 + entry[1];
port->sense = port->drive;
port->adapter.algo = &nouveau_i2c_bit_algo;
break;
case 5: /* NV50- */
port->drive = entry[0] & 0x0f;
@ -402,7 +227,6 @@ nouveau_i2c_init(struct drm_device *dev)
port->drive = 0x00d014 + (port->drive * 0x20);
port->sense = port->drive;
}
port->adapter.algo = &nouveau_i2c_bit_algo;
break;
case 6: /* NV50- DP AUX */
port->drive = entry[0];
@ -413,7 +237,7 @@ nouveau_i2c_init(struct drm_device *dev)
break;
}
if (!port->adapter.algo) {
if (!port->adapter.algo && !port->drive) {
NV_ERROR(dev, "I2C%d: type %d index %x/%x unknown\n",
i, port->type, port->drive, port->sense);
kfree(port);
@ -429,7 +253,26 @@ nouveau_i2c_init(struct drm_device *dev)
port->dcb = ROM32(entry[0]);
i2c_set_adapdata(&port->adapter, i2c);
ret = i2c_add_adapter(&port->adapter);
if (port->adapter.algo != &nouveau_dp_i2c_algo) {
port->adapter.algo_data = &port->bit;
port->bit.udelay = 10;
port->bit.timeout = usecs_to_jiffies(2200);
port->bit.data = port;
port->bit.setsda = i2c_drive_sda;
port->bit.setscl = i2c_drive_scl;
port->bit.getsda = i2c_sense_sda;
port->bit.getscl = i2c_sense_scl;
i2c_drive_scl(port, 0);
i2c_drive_sda(port, 1);
i2c_drive_scl(port, 1);
ret = i2c_bit_add_bus(&port->adapter);
} else {
port->adapter.algo = &nouveau_dp_i2c_algo;
ret = i2c_add_adapter(&port->adapter);
}
if (ret) {
NV_ERROR(dev, "I2C%d: failed register: %d\n", i, ret);
kfree(port);

1
drivers/gpu/drm/nouveau/nouveau_i2c.h
View File

@ -34,6 +34,7 @@
struct nouveau_i2c_chan {
struct i2c_adapter adapter;
struct drm_device *dev;
struct i2c_algo_bit_data bit;
struct list_head head;
u8 index;
u8 type;

4
drivers/leds/leds-netxbig.c
View File

@ -112,7 +112,7 @@ static int __devinit gpio_ext_init(struct netxbig_gpio_ext *gpio_ext)
return err;
}
static void __devexit gpio_ext_free(struct netxbig_gpio_ext *gpio_ext)
static void gpio_ext_free(struct netxbig_gpio_ext *gpio_ext)
{
int i;
@ -294,7 +294,7 @@ static ssize_t netxbig_led_sata_show(struct device *dev,
static DEVICE_ATTR(sata, 0644, netxbig_led_sata_show, netxbig_led_sata_store);
static void __devexit delete_netxbig_led(struct netxbig_led_data *led_dat)
static void delete_netxbig_led(struct netxbig_led_data *led_dat)
{
if (led_dat->mode_val[NETXBIG_LED_SATA] != NETXBIG_LED_INVALID_MODE)
device_remove_file(led_dat->cdev.dev, &dev_attr_sata);

Some files were not shown because too many files have changed in this diff Show More