mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
iwlwifi: refactor shared mem parsing
Refactor the shared memory command parsing into common code. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
parent
235acb1894
commit
d0b813fcdc
@ -11,7 +11,7 @@ iwlwifi-$(CONFIG_IWLDVM) += cfg/1000.o cfg/2000.o cfg/5000.o cfg/6000.o
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iwlwifi-$(CONFIG_IWLMVM) += cfg/7000.o cfg/8000.o cfg/9000.o cfg/a000.o
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iwlwifi-objs += iwl-trans.o
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iwlwifi-objs += fw/notif-wait.o
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iwlwifi-$(CONFIG_IWLMVM) += fw/paging.o
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iwlwifi-$(CONFIG_IWLMVM) += fw/paging.o fw/smem.o
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iwlwifi-objs += $(iwlwifi-m)
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@ -269,4 +269,91 @@ struct iwl_fw_get_item_resp {
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__le32 item_val;
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} __packed; /* FW_GET_ITEM_RSP_S_VER_1 */
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#define TX_FIFO_MAX_NUM_9000 8
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#define TX_FIFO_MAX_NUM 15
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#define RX_FIFO_MAX_NUM 2
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#define TX_FIFO_INTERNAL_MAX_NUM 6
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/**
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* struct iwl_shared_mem_cfg_v2 - Shared memory configuration information
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*
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* @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
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* accessible)
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* @shared_mem_size: shared memory size
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* @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
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* 0x0 as accessible only via DBGM RDAT)
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* @sample_buff_size: internal sample buff size
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* @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
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* 8000 HW set to 0x0 as not accessible)
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* @txfifo_size: size of TXF0 ... TXF7
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* @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
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* @page_buff_addr: used by UMAC and performance debug (page miss analysis),
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* when paging is not supported this should be 0
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* @page_buff_size: size of %page_buff_addr
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* @rxfifo_addr: Start address of rxFifo
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* @internal_txfifo_addr: start address of internalFifo
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* @internal_txfifo_size: internal fifos' size
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*
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* NOTE: on firmware that don't have IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG
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* set, the last 3 members don't exist.
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*/
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struct iwl_shared_mem_cfg_v2 {
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__le32 shared_mem_addr;
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__le32 shared_mem_size;
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__le32 sample_buff_addr;
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__le32 sample_buff_size;
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__le32 txfifo_addr;
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__le32 txfifo_size[TX_FIFO_MAX_NUM_9000];
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__le32 rxfifo_size[RX_FIFO_MAX_NUM];
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__le32 page_buff_addr;
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__le32 page_buff_size;
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__le32 rxfifo_addr;
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__le32 internal_txfifo_addr;
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__le32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
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} __packed; /* SHARED_MEM_ALLOC_API_S_VER_2 */
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/**
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* struct iwl_shared_mem_lmac_cfg - LMAC shared memory configuration
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*
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* @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB)
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* @txfifo_size: size of TX FIFOs
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* @rxfifo1_addr: RXF1 addr
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* @rxfifo1_size: RXF1 size
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*/
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struct iwl_shared_mem_lmac_cfg {
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__le32 txfifo_addr;
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__le32 txfifo_size[TX_FIFO_MAX_NUM];
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__le32 rxfifo1_addr;
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__le32 rxfifo1_size;
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} __packed; /* SHARED_MEM_ALLOC_LMAC_API_S_VER_1 */
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/**
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* struct iwl_shared_mem_cfg - Shared memory configuration information
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*
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* @shared_mem_addr: shared memory address
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* @shared_mem_size: shared memory size
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* @sample_buff_addr: internal sample (mon/adc) buff addr
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* @sample_buff_size: internal sample buff size
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* @rxfifo2_addr: start addr of RXF2
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* @rxfifo2_size: size of RXF2
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* @page_buff_addr: used by UMAC and performance debug (page miss analysis),
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* when paging is not supported this should be 0
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* @page_buff_size: size of %page_buff_addr
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* @lmac_num: number of LMACs (1 or 2)
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* @lmac_smem: per - LMAC smem data
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*/
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struct iwl_shared_mem_cfg {
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__le32 shared_mem_addr;
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__le32 shared_mem_size;
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__le32 sample_buff_addr;
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__le32 sample_buff_size;
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__le32 rxfifo2_addr;
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__le32 rxfifo2_size;
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__le32 page_buff_addr;
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__le32 page_buff_size;
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__le32 lmac_num;
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struct iwl_shared_mem_lmac_cfg lmac_smem[2];
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} __packed; /* SHARED_MEM_ALLOC_API_S_VER_3 */
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#endif /* __iwl_fw_api_h__*/
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@ -63,6 +63,19 @@
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#include "img.h"
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#include "api.h"
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#define MAX_NUM_LMAC 2
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struct iwl_fwrt_shared_mem_cfg {
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int num_lmacs;
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int num_txfifo_entries;
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struct {
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u32 txfifo_size[TX_FIFO_MAX_NUM];
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u32 rxfifo1_size;
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} lmac[MAX_NUM_LMAC];
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u32 rxfifo2_size;
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u32 internal_txfifo_addr;
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u32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
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};
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/**
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* struct iwl_fw_runtime - runtime data for firmware
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* @fw: firmware image
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@ -71,6 +84,7 @@
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* @fw_paging_db: paging database
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* @num_of_paging_blk: number of paging blocks
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* @num_of_pages_in_last_blk: number of pages in the last block
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* @smem_cfg: saved firmware SMEM configuration
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*/
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struct iwl_fw_runtime {
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struct iwl_trans *trans;
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@ -81,6 +95,9 @@ struct iwl_fw_runtime {
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struct iwl_fw_paging fw_paging_db[NUM_OF_FW_PAGING_BLOCKS];
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u16 num_of_paging_blk;
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u16 num_of_pages_in_last_blk;
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/* memory configuration */
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struct iwl_fwrt_shared_mem_cfg smem_cfg;
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};
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static inline void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt,
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@ -96,4 +113,6 @@ static inline void iwl_fw_runtime_init(struct iwl_fw_runtime *fwrt,
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int iwl_init_paging(struct iwl_fw_runtime *fwrt, enum iwl_ucode_type type);
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void iwl_free_fw_paging(struct iwl_fw_runtime *fwrt);
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void iwl_get_shared_mem_conf(struct iwl_fw_runtime *fwrt);
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#endif /* __iwl_fw_runtime_h__ */
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156
drivers/net/wireless/intel/iwlwifi/fw/smem.c
Normal file
156
drivers/net/wireless/intel/iwlwifi/fw/smem.c
Normal file
@ -0,0 +1,156 @@
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/******************************************************************************
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* The full GNU General Public License is included in this distribution
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* in the file called COPYING.
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*
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* Contact Information:
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* Intel Linux Wireless <linuxwifi@intel.com>
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* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*
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* BSD LICENSE
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*
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* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*****************************************************************************/
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#include "iwl-drv.h"
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#include "runtime.h"
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/* FIXME */
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#define SHARED_MEM_CFG_CMD 0x00
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#define SYSTEM_GROUP 0x2
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#define SHARED_MEM_CFG 0x25
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static void iwl_parse_shared_mem_a000(struct iwl_fw_runtime *fwrt,
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struct iwl_rx_packet *pkt)
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{
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struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
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int i, lmac;
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int lmac_num = le32_to_cpu(mem_cfg->lmac_num);
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if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem)))
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return;
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fwrt->smem_cfg.num_lmacs = lmac_num;
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fwrt->smem_cfg.num_txfifo_entries =
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ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size);
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fwrt->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size);
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for (lmac = 0; lmac < lmac_num; lmac++) {
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struct iwl_shared_mem_lmac_cfg *lmac_cfg =
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&mem_cfg->lmac_smem[lmac];
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for (i = 0; i < ARRAY_SIZE(lmac_cfg->txfifo_size); i++)
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fwrt->smem_cfg.lmac[lmac].txfifo_size[i] =
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le32_to_cpu(lmac_cfg->txfifo_size[i]);
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fwrt->smem_cfg.lmac[lmac].rxfifo1_size =
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le32_to_cpu(lmac_cfg->rxfifo1_size);
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}
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}
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static void iwl_parse_shared_mem(struct iwl_fw_runtime *fwrt,
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struct iwl_rx_packet *pkt)
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{
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struct iwl_shared_mem_cfg_v2 *mem_cfg = (void *)pkt->data;
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int i;
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fwrt->smem_cfg.num_lmacs = 1;
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fwrt->smem_cfg.num_txfifo_entries = ARRAY_SIZE(mem_cfg->txfifo_size);
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for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
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fwrt->smem_cfg.lmac[0].txfifo_size[i] =
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le32_to_cpu(mem_cfg->txfifo_size[i]);
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fwrt->smem_cfg.lmac[0].rxfifo1_size =
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le32_to_cpu(mem_cfg->rxfifo_size[0]);
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fwrt->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo_size[1]);
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/* new API has more data, from rxfifo_addr field and on */
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if (fw_has_capa(&fwrt->fw->ucode_capa,
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IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
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BUILD_BUG_ON(sizeof(fwrt->smem_cfg.internal_txfifo_size) !=
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sizeof(mem_cfg->internal_txfifo_size));
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for (i = 0;
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i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
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i++)
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fwrt->smem_cfg.internal_txfifo_size[i] =
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le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
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}
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}
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void iwl_get_shared_mem_conf(struct iwl_fw_runtime *fwrt)
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{
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struct iwl_host_cmd cmd = {
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.flags = CMD_WANT_SKB,
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.data = { NULL, },
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.len = { 0, },
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};
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struct iwl_rx_packet *pkt;
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if (fw_has_capa(&fwrt->fw->ucode_capa,
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IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
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cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
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else
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cmd.id = SHARED_MEM_CFG;
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if (WARN_ON(iwl_trans_send_cmd(fwrt->trans, &cmd)))
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return;
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pkt = cmd.resp_pkt;
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if (fwrt->trans->cfg->device_family == IWL_DEVICE_FAMILY_A000)
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iwl_parse_shared_mem_a000(fwrt, pkt);
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else
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iwl_parse_shared_mem(fwrt, pkt);
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IWL_DEBUG_INFO(fwrt, "SHARED MEM CFG: got memory offsets/sizes\n");
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iwl_free_resp(&cmd);
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}
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IWL_EXPORT_SYMBOL(iwl_get_shared_mem_conf);
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@ -2481,93 +2481,6 @@ struct iwl_tdls_config_res {
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struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
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} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
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#define TX_FIFO_MAX_NUM_9000 8
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#define TX_FIFO_MAX_NUM 15
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#define RX_FIFO_MAX_NUM 2
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#define TX_FIFO_INTERNAL_MAX_NUM 6
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/**
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* struct iwl_shared_mem_cfg_v2 - Shared memory configuration information
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*
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* @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
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* accessible)
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* @shared_mem_size: shared memory size
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* @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
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* 0x0 as accessible only via DBGM RDAT)
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* @sample_buff_size: internal sample buff size
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* @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
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* 8000 HW set to 0x0 as not accessible)
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* @txfifo_size: size of TXF0 ... TXF7
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* @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
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* @page_buff_addr: used by UMAC and performance debug (page miss analysis),
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* when paging is not supported this should be 0
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* @page_buff_size: size of %page_buff_addr
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* @rxfifo_addr: Start address of rxFifo
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* @internal_txfifo_addr: start address of internalFifo
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* @internal_txfifo_size: internal fifos' size
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*
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* NOTE: on firmware that don't have IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG
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* set, the last 3 members don't exist.
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*/
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struct iwl_shared_mem_cfg_v2 {
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__le32 shared_mem_addr;
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__le32 shared_mem_size;
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__le32 sample_buff_addr;
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__le32 sample_buff_size;
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__le32 txfifo_addr;
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__le32 txfifo_size[TX_FIFO_MAX_NUM_9000];
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__le32 rxfifo_size[RX_FIFO_MAX_NUM];
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__le32 page_buff_addr;
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__le32 page_buff_size;
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__le32 rxfifo_addr;
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__le32 internal_txfifo_addr;
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__le32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
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} __packed; /* SHARED_MEM_ALLOC_API_S_VER_2 */
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/**
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* struct iwl_shared_mem_lmac_cfg - LMAC shared memory configuration
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*
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* @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB)
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* @txfifo_size: size of TX FIFOs
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* @rxfifo1_addr: RXF1 addr
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* @rxfifo1_size: RXF1 size
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*/
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struct iwl_shared_mem_lmac_cfg {
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__le32 txfifo_addr;
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__le32 txfifo_size[TX_FIFO_MAX_NUM];
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__le32 rxfifo1_addr;
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__le32 rxfifo1_size;
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} __packed; /* SHARED_MEM_ALLOC_LMAC_API_S_VER_1 */
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/**
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* struct iwl_shared_mem_cfg - Shared memory configuration information
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*
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* @shared_mem_addr: shared memory address
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* @shared_mem_size: shared memory size
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* @sample_buff_addr: internal sample (mon/adc) buff addr
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* @sample_buff_size: internal sample buff size
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* @rxfifo2_addr: start addr of RXF2
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* @rxfifo2_size: size of RXF2
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* @page_buff_addr: used by UMAC and performance debug (page miss analysis),
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* when paging is not supported this should be 0
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* @page_buff_size: size of %page_buff_addr
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* @lmac_num: number of LMACs (1 or 2)
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* @lmac_smem: per - LMAC smem data
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*/
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struct iwl_shared_mem_cfg {
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__le32 shared_mem_addr;
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__le32 shared_mem_size;
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__le32 sample_buff_addr;
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__le32 sample_buff_size;
|
||||
__le32 rxfifo2_addr;
|
||||
__le32 rxfifo2_size;
|
||||
__le32 page_buff_addr;
|
||||
__le32 page_buff_size;
|
||||
__le32 lmac_num;
|
||||
struct iwl_shared_mem_lmac_cfg lmac_smem[2];
|
||||
} __packed; /* SHARED_MEM_ALLOC_API_S_VER_3 */
|
||||
|
||||
/**
|
||||
* struct iwl_mu_group_mgmt_cmd - VHT MU-MIMO group configuration
|
||||
*
|
||||
|
@ -212,7 +212,7 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
|
||||
struct iwl_fw_error_dump_data **dump_data)
|
||||
{
|
||||
struct iwl_fw_error_dump_fifo *fifo_hdr;
|
||||
struct iwl_mvm_shared_mem_cfg *cfg = &mvm->smem_cfg;
|
||||
struct iwl_fwrt_shared_mem_cfg *cfg = &mvm->fwrt.smem_cfg;
|
||||
u32 *fifo_data;
|
||||
u32 fifo_len;
|
||||
unsigned long flags;
|
||||
@ -227,12 +227,12 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
|
||||
iwl_mvm_dump_rxf(mvm, dump_data, cfg->rxfifo2_size,
|
||||
RXF_DIFF_FROM_PREV, 1);
|
||||
/* Pull LMAC2 RXF1 */
|
||||
if (mvm->smem_cfg.num_lmacs > 1)
|
||||
if (mvm->fwrt.smem_cfg.num_lmacs > 1)
|
||||
iwl_mvm_dump_rxf(mvm, dump_data, cfg->lmac[1].rxfifo1_size,
|
||||
LMAC2_PRPH_OFFSET, 2);
|
||||
|
||||
/* Pull TXF data from LMAC1 */
|
||||
for (i = 0; i < mvm->smem_cfg.num_txfifo_entries; i++) {
|
||||
for (i = 0; i < mvm->fwrt.smem_cfg.num_txfifo_entries; i++) {
|
||||
/* Mark the number of TXF we're pulling now */
|
||||
iwl_trans_write_prph(mvm->trans, TXF_LARC_NUM, i);
|
||||
iwl_mvm_dump_txf(mvm, dump_data, cfg->lmac[0].txfifo_size[i],
|
||||
@ -240,8 +240,8 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
|
||||
}
|
||||
|
||||
/* Pull TXF data from LMAC2 */
|
||||
if (mvm->smem_cfg.num_lmacs > 1) {
|
||||
for (i = 0; i < mvm->smem_cfg.num_txfifo_entries; i++) {
|
||||
if (mvm->fwrt.smem_cfg.num_lmacs > 1) {
|
||||
for (i = 0; i < mvm->fwrt.smem_cfg.num_txfifo_entries; i++) {
|
||||
/* Mark the number of TXF we're pulling now */
|
||||
iwl_trans_write_prph(mvm->trans,
|
||||
TXF_LARC_NUM + LMAC2_PRPH_OFFSET,
|
||||
@ -257,11 +257,11 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
|
||||
IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
|
||||
/* Pull UMAC internal TXF data from all TXFs */
|
||||
for (i = 0;
|
||||
i < ARRAY_SIZE(mvm->smem_cfg.internal_txfifo_size);
|
||||
i < ARRAY_SIZE(mvm->fwrt.smem_cfg.internal_txfifo_size);
|
||||
i++) {
|
||||
fifo_hdr = (void *)(*dump_data)->data;
|
||||
fifo_data = (void *)fifo_hdr->data;
|
||||
fifo_len = mvm->smem_cfg.internal_txfifo_size[i];
|
||||
fifo_len = mvm->fwrt.smem_cfg.internal_txfifo_size[i];
|
||||
|
||||
/* No need to try to read the data if the length is 0 */
|
||||
if (fifo_len == 0)
|
||||
@ -277,7 +277,7 @@ static void iwl_mvm_dump_fifos(struct iwl_mvm *mvm,
|
||||
|
||||
/* Mark the number of TXF we're pulling now */
|
||||
iwl_trans_write_prph(mvm->trans, TXF_CPU2_NUM, i +
|
||||
mvm->smem_cfg.num_txfifo_entries);
|
||||
mvm->fwrt.smem_cfg.num_txfifo_entries);
|
||||
|
||||
fifo_hdr->available_bytes =
|
||||
cpu_to_le32(iwl_trans_read_prph(mvm->trans,
|
||||
@ -582,7 +582,7 @@ void iwl_mvm_fw_error_dump(struct iwl_mvm *mvm)
|
||||
|
||||
/* reading RXF/TXF sizes */
|
||||
if (test_bit(STATUS_FW_ERROR, &mvm->trans->status)) {
|
||||
struct iwl_mvm_shared_mem_cfg *mem_cfg = &mvm->smem_cfg;
|
||||
struct iwl_fwrt_shared_mem_cfg *mem_cfg = &mvm->fwrt.smem_cfg;
|
||||
|
||||
fifo_data_len = 0;
|
||||
|
||||
|
@ -568,95 +568,6 @@ int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm,
|
||||
struct iwl_rx_packet *pkt)
|
||||
{
|
||||
struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
|
||||
int i, lmac;
|
||||
int lmac_num = le32_to_cpu(mem_cfg->lmac_num);
|
||||
|
||||
if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem)))
|
||||
return;
|
||||
|
||||
mvm->smem_cfg.num_lmacs = lmac_num;
|
||||
mvm->smem_cfg.num_txfifo_entries =
|
||||
ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size);
|
||||
mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size);
|
||||
|
||||
for (lmac = 0; lmac < lmac_num; lmac++) {
|
||||
struct iwl_shared_mem_lmac_cfg *lmac_cfg =
|
||||
&mem_cfg->lmac_smem[lmac];
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(lmac_cfg->txfifo_size); i++)
|
||||
mvm->smem_cfg.lmac[lmac].txfifo_size[i] =
|
||||
le32_to_cpu(lmac_cfg->txfifo_size[i]);
|
||||
mvm->smem_cfg.lmac[lmac].rxfifo1_size =
|
||||
le32_to_cpu(lmac_cfg->rxfifo1_size);
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm,
|
||||
struct iwl_rx_packet *pkt)
|
||||
{
|
||||
struct iwl_shared_mem_cfg_v2 *mem_cfg = (void *)pkt->data;
|
||||
int i;
|
||||
|
||||
mvm->smem_cfg.num_lmacs = 1;
|
||||
|
||||
mvm->smem_cfg.num_txfifo_entries = ARRAY_SIZE(mem_cfg->txfifo_size);
|
||||
for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
|
||||
mvm->smem_cfg.lmac[0].txfifo_size[i] =
|
||||
le32_to_cpu(mem_cfg->txfifo_size[i]);
|
||||
|
||||
mvm->smem_cfg.lmac[0].rxfifo1_size =
|
||||
le32_to_cpu(mem_cfg->rxfifo_size[0]);
|
||||
mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo_size[1]);
|
||||
|
||||
/* new API has more data, from rxfifo_addr field and on */
|
||||
if (fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
|
||||
BUILD_BUG_ON(sizeof(mvm->smem_cfg.internal_txfifo_size) !=
|
||||
sizeof(mem_cfg->internal_txfifo_size));
|
||||
|
||||
for (i = 0;
|
||||
i < ARRAY_SIZE(mvm->smem_cfg.internal_txfifo_size);
|
||||
i++)
|
||||
mvm->smem_cfg.internal_txfifo_size[i] =
|
||||
le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
|
||||
{
|
||||
struct iwl_host_cmd cmd = {
|
||||
.flags = CMD_WANT_SKB,
|
||||
.data = { NULL, },
|
||||
.len = { 0, },
|
||||
};
|
||||
struct iwl_rx_packet *pkt;
|
||||
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
|
||||
if (fw_has_capa(&mvm->fw->ucode_capa,
|
||||
IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
|
||||
cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
|
||||
else
|
||||
cmd.id = SHARED_MEM_CFG;
|
||||
|
||||
if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
|
||||
return;
|
||||
|
||||
pkt = cmd.resp_pkt;
|
||||
if (iwl_mvm_has_new_tx_api(mvm))
|
||||
iwl_mvm_parse_shared_mem_a000(mvm, pkt);
|
||||
else
|
||||
iwl_mvm_parse_shared_mem(mvm, pkt);
|
||||
|
||||
IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
|
||||
|
||||
iwl_free_resp(&cmd);
|
||||
}
|
||||
|
||||
static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
|
||||
{
|
||||
struct iwl_ltr_config_cmd cmd = {
|
||||
@ -1174,7 +1085,7 @@ int iwl_mvm_up(struct iwl_mvm *mvm)
|
||||
goto error;
|
||||
}
|
||||
|
||||
iwl_mvm_get_shared_mem_conf(mvm);
|
||||
iwl_get_shared_mem_conf(&mvm->fwrt);
|
||||
|
||||
ret = iwl_mvm_sf_update(mvm, NULL, false);
|
||||
if (ret)
|
||||
|
@ -607,19 +607,6 @@ enum iwl_mvm_tdls_cs_state {
|
||||
IWL_MVM_TDLS_SW_ACTIVE,
|
||||
};
|
||||
|
||||
#define MAX_NUM_LMAC 2
|
||||
struct iwl_mvm_shared_mem_cfg {
|
||||
int num_lmacs;
|
||||
int num_txfifo_entries;
|
||||
struct {
|
||||
u32 txfifo_size[TX_FIFO_MAX_NUM];
|
||||
u32 rxfifo1_size;
|
||||
} lmac[MAX_NUM_LMAC];
|
||||
u32 rxfifo2_size;
|
||||
u32 internal_txfifo_addr;
|
||||
u32 internal_txfifo_size[TX_FIFO_INTERNAL_MAX_NUM];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct iwl_mvm_reorder_buffer - per ra/tid/queue reorder buffer
|
||||
* @head_sn: reorder window head sn
|
||||
@ -1053,7 +1040,6 @@ struct iwl_mvm {
|
||||
} peer;
|
||||
} tdls_cs;
|
||||
|
||||
struct iwl_mvm_shared_mem_cfg smem_cfg;
|
||||
|
||||
u32 ciphers[IWL_MVM_NUM_CIPHERS];
|
||||
struct ieee80211_cipher_scheme cs[IWL_UCODE_MAX_CS];
|
||||
|
@ -761,7 +761,8 @@ static int iwl_mvm_tx_tso(struct iwl_mvm *mvm, struct sk_buff *skb,
|
||||
* fifo to be able to send bursts.
|
||||
*/
|
||||
max_amsdu_len = min_t(unsigned int, max_amsdu_len,
|
||||
mvm->smem_cfg.lmac[0].txfifo_size[txf] - 256);
|
||||
mvm->fwrt.smem_cfg.lmac[0].txfifo_size[txf] -
|
||||
256);
|
||||
|
||||
if (unlikely(dbg_max_amsdu_len))
|
||||
max_amsdu_len = min_t(unsigned int, max_amsdu_len,
|
||||
|
Loading…
Reference in New Issue
Block a user