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ar5523: Fix sparse endianness warnings
__be32 variables where used a little careless leading to sparse warnings. Treat them a little more gentle. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Pontus Fuchs <pontus.fuchs@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -50,18 +50,19 @@ static void ar5523_read_reply(struct ar5523 *ar, struct ar5523_cmd_hdr *hdr,
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struct ar5523_tx_cmd *cmd)
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{
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int dlen, olen;
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u32 *rp;
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__be32 *rp;
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dlen = hdr->len - sizeof(*hdr);
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dlen = be32_to_cpu(hdr->len) - sizeof(*hdr);
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if (dlen < 0) {
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WARN_ON(1);
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goto out;
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}
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ar5523_dbg(ar, "Code = %d len = %d\n", hdr->code & 0xff, dlen);
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ar5523_dbg(ar, "Code = %d len = %d\n", be32_to_cpu(hdr->code) & 0xff,
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dlen);
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rp = (u32 *)(hdr + 1);
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rp = (__be32 *)(hdr + 1);
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if (dlen >= sizeof(u32)) {
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olen = be32_to_cpu(rp[0]);
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dlen -= sizeof(u32);
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@ -95,6 +96,7 @@ static void ar5523_cmd_rx_cb(struct urb *urb)
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struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
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struct ar5523_cmd_hdr *hdr = ar->rx_cmd_buf;
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int dlen;
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u32 code, hdrlen;
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if (urb->status) {
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if (urb->status != -ESHUTDOWN)
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@ -110,15 +112,15 @@ static void ar5523_cmd_rx_cb(struct urb *urb)
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ar5523_dbg(ar, "%s code %02x priv %d\n", __func__,
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be32_to_cpu(hdr->code) & 0xff, hdr->priv);
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hdr->code = be32_to_cpu(hdr->code);
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hdr->len = be32_to_cpu(hdr->len);
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code = be32_to_cpu(hdr->code);
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hdrlen = be32_to_cpu(hdr->len);
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switch (hdr->code & 0xff) {
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switch (code & 0xff) {
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default:
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/* reply to a read command */
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if (hdr->priv != AR5523_CMD_ID) {
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ar5523_err(ar, "Unexpected command id: %02x\n",
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hdr->code & 0xff);
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code & 0xff);
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goto skip;
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}
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ar5523_read_reply(ar, hdr, cmd);
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@ -147,7 +149,7 @@ static void ar5523_cmd_rx_cb(struct urb *urb)
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case WDCMSG_TARGET_START:
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/* This command returns a bogus id so it needs special
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handling */
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dlen = hdr->len - sizeof(*hdr);
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dlen = hdrlen - sizeof(*hdr);
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if (dlen != (int)sizeof(u32)) {
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ar5523_err(ar, "Invalid reply to WDCMSG_TARGET_START");
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return;
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@ -303,7 +305,7 @@ static int ar5523_config(struct ar5523 *ar, u32 reg, u32 val)
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write.reg = cpu_to_be32(reg);
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write.len = cpu_to_be32(0); /* 0 = single write */
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*(u32 *)write.data = cpu_to_be32(val);
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*(__be32 *)write.data = cpu_to_be32(val);
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error = ar5523_cmd_write(ar, WDCMSG_TARGET_SET_CONFIG, &write,
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3 * sizeof(u32), 0);
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@ -335,29 +337,30 @@ static int ar5523_get_status(struct ar5523 *ar, u32 which, void *odata,
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int olen)
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{
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int error;
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__be32 which_be;
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which = cpu_to_be32(which);
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which_be = cpu_to_be32(which);
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error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_STATUS,
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&which, sizeof(which), odata, olen, AR5523_CMD_FLAG_MAGIC);
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&which_be, sizeof(which_be), odata, olen, AR5523_CMD_FLAG_MAGIC);
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if (error != 0)
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ar5523_err(ar, "could not read EEPROM offset 0x%02x\n",
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be32_to_cpu(which));
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ar5523_err(ar, "could not read EEPROM offset 0x%02x\n", which);
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return error;
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}
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static int ar5523_get_capability(struct ar5523 *ar, u32 cap, u32 *val)
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{
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int error;
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__be32 cap_be, val_be;
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cap = cpu_to_be32(cap);
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error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_CAPABILITY,
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&cap, sizeof(cap), val, sizeof(u32), AR5523_CMD_FLAG_MAGIC);
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cap_be = cpu_to_be32(cap);
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error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_CAPABILITY, &cap_be,
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sizeof(cap_be), &val_be, sizeof(__be32),
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AR5523_CMD_FLAG_MAGIC);
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if (error != 0) {
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ar5523_err(ar, "could not read capability %u\n",
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be32_to_cpu(cap));
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ar5523_err(ar, "could not read capability %u\n", cap);
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return error;
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}
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*val = be32_to_cpu(*val);
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*val = be32_to_cpu(val_be);
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return error;
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}
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@ -161,7 +161,7 @@ struct ar5523_rx_desc {
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struct ar5523_tx_desc {
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__be32 msglen;
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__be32 msgid; /* msg id (supplied by host) */
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u32 msgid; /* msg id (supplied by host) */
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__be32 type; /* opcode: WDMSG_SEND or WDCMSG_FLUSH */
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__be32 txqid; /* tx queue id and flags */
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#define UATH_TXQID_MASK 0x0f
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