AuxXxilium/linux_dsm_epyc7002
1
0
Fork 0
mirror of https://github.com/AuxXxilium/linux_dsm_epyc7002.git synced 2025-03-20 02:45:20 +07:00
Code Issues Actions Packages Projects Releases Wiki Activity

mdio: Expose 10GBASE-T MDI-X status via ethtool

Browse Source 
This is available in a standard MDIO register in 10GBASE-T PHYs.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Ben Hutchings 2009-06-10 05:28:04 +00:00 committed by David S. Miller
parent b8facca01b
commit d005ba6cc8
2 changed files with 26 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/net/mdio.c
View File

@ -296,6 +296,23 @@ void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio,
ecmd->duplex = (reg & MDIO_CTRL1_FULLDPLX || ecmd->duplex = (reg & MDIO_CTRL1_FULLDPLX ||
ecmd->speed == SPEED_10000); ecmd->speed == SPEED_10000);
} }
/* 10GBASE-T MDI/MDI-X */
if (ecmd->port == PORT_TP && ecmd->speed == SPEED_10000) {
switch (mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
MDIO_PMA_10GBT_SWAPPOL)) {
case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
ecmd->eth_tp_mdix = ETH_TP_MDI;
break;
case 0:
ecmd->eth_tp_mdix = ETH_TP_MDI_X;
break;
default:
/* It's complicated... */
ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
break;
}
}
} }
EXPORT_SYMBOL(mdio45_ethtool_gset_npage); EXPORT_SYMBOL(mdio45_ethtool_gset_npage);

9
include/linux/mdio.h
View File

@ -45,6 +45,7 @@
#define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */ #define MDIO_PHYXS_LNSTAT 24 /* PHY XGXS lane state */
/* Media-dependent registers. */ /* Media-dependent registers. */
#define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
#define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */ #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
#define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A. #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
* Lanes B-D are numbered 134-136. */ * Lanes B-D are numbered 134-136. */
@ -195,6 +196,14 @@
#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008 #define MDIO_PHYXS_LNSTAT_SYNC3 0x0008
#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000 #define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
/* PMA 10GBASE-T pair swap & polarity */
#define MDIO_PMA_10GBT_SWAPPOL_ABNX 0x0001 /* Pair A/B uncrossed */
#define MDIO_PMA_10GBT_SWAPPOL_CDNX 0x0002 /* Pair C/D uncrossed */
#define MDIO_PMA_10GBT_SWAPPOL_AREV 0x0100 /* Pair A polarity reversed */
#define MDIO_PMA_10GBT_SWAPPOL_BREV 0x0200 /* Pair B polarity reversed */
#define MDIO_PMA_10GBT_SWAPPOL_CREV 0x0400 /* Pair C polarity reversed */
#define MDIO_PMA_10GBT_SWAPPOL_DREV 0x0800 /* Pair D polarity reversed */
/* PMA 10GBASE-T TX power register. */ /* PMA 10GBASE-T TX power register. */
#define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */ #define MDIO_PMA_10GBT_TXPWR_SHORT 0x0001 /* Short-reach mode */