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PCI: dwc: Ensure FAST_LINK_MODE is cleared
"Fast Link Mode" is a simulation environment speed up setting which should
never be set and the default is not set. However some Amlogic platforms
have it set (by firmware presumably). See commit 87dccf0932
("PCI:
amlogic: meson: Don't use FAST_LINK_MODE to set up link") for more
information. Let's clear it in core DWC code so we can drop some vendor
specific code.
Link: https://lore.kernel.org/r/20200821035420.380495-25-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
6ffc02d236
commit
cff9244432
@ -559,6 +559,9 @@ void dw_pcie_setup(struct dw_pcie *pci)
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dev_dbg(pci->dev, "iATU unroll: %s\n", pci->iatu_unroll_enabled ?
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"enabled" : "disabled");
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val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
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val &= ~PORT_LINK_FAST_LINK_MODE;
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dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val);
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of_property_read_u32(np, "num-lanes", &pci->num_lanes);
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if (!pci->num_lanes) {
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@ -567,7 +570,7 @@ void dw_pcie_setup(struct dw_pcie *pci)
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}
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/* Set the number of lanes */
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val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL);
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val &= ~PORT_LINK_FAST_LINK_MODE;
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val &= ~PORT_LINK_MODE_MASK;
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switch (pci->num_lanes) {
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case 1:
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@ -36,6 +36,7 @@
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#define PCIE_PORT_LINK_CONTROL 0x710
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#define PORT_LINK_DLL_LINK_EN BIT(5)
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#define PORT_LINK_FAST_LINK_MODE BIT(7)
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#define PORT_LINK_MODE_MASK GENMASK(21, 16)
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#define PORT_LINK_MODE(n) FIELD_PREP(PORT_LINK_MODE_MASK, n)
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#define PORT_LINK_MODE_1_LANES PORT_LINK_MODE(0x1)
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