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genirq: Generic chip: Remove the local cur_regs() function
Since we already have an irq_data_get_chip_type() function which returns a pointer to irq_chip_type, use that instead of cur_regs(). Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Joey Oravec <joravec@drewtech.com> Cc: Lennert Buytenhek <kernel@wantstofly.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Cc: Holger Brunck <Holger.Brunck@keymile.com> Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Grant Likely <grant.likely@linaro.org> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree-discuss@lists.ozlabs.org Cc: Rob Herring <rob.herring@calxeda.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: Simon Guinot <simon@sequanux.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jean-Francois Moine <moinejf@free.fr> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Rob Landley <rob@landley.net> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/20130506142539.010164766@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -16,11 +16,6 @@
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static LIST_HEAD(gc_list);
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static DEFINE_RAW_SPINLOCK(gc_lock);
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static inline struct irq_chip_regs *cur_regs(struct irq_data *d)
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{
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return &container_of(d->chip, struct irq_chip_type, chip)->regs;
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}
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/**
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* irq_gc_noop - NOOP function
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* @d: irq_data
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@ -39,10 +34,11 @@ void irq_gc_noop(struct irq_data *d)
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void irq_gc_mask_disable_reg(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->disable);
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irq_reg_writel(mask, gc->reg_base + ct->regs.disable);
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gc->mask_cache &= ~mask;
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irq_gc_unlock(gc);
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}
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@ -57,11 +53,12 @@ void irq_gc_mask_disable_reg(struct irq_data *d)
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void irq_gc_mask_set_bit(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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gc->mask_cache |= mask;
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irq_reg_writel(gc->mask_cache, gc->reg_base + cur_regs(d)->mask);
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irq_reg_writel(gc->mask_cache, gc->reg_base + ct->regs.mask);
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irq_gc_unlock(gc);
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}
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@ -75,11 +72,12 @@ void irq_gc_mask_set_bit(struct irq_data *d)
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void irq_gc_mask_clr_bit(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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gc->mask_cache &= ~mask;
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irq_reg_writel(gc->mask_cache, gc->reg_base + cur_regs(d)->mask);
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irq_reg_writel(gc->mask_cache, gc->reg_base + ct->regs.mask);
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irq_gc_unlock(gc);
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}
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@ -93,10 +91,11 @@ void irq_gc_mask_clr_bit(struct irq_data *d)
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void irq_gc_unmask_enable_reg(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->enable);
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irq_reg_writel(mask, gc->reg_base + ct->regs.enable);
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gc->mask_cache |= mask;
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irq_gc_unlock(gc);
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}
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@ -108,10 +107,11 @@ void irq_gc_unmask_enable_reg(struct irq_data *d)
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void irq_gc_ack_set_bit(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->ack);
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irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
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irq_gc_unlock(gc);
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}
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@ -122,10 +122,11 @@ void irq_gc_ack_set_bit(struct irq_data *d)
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void irq_gc_ack_clr_bit(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = ~(1 << (d->irq - gc->irq_base));
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->ack);
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irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
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irq_gc_unlock(gc);
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}
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@ -136,11 +137,12 @@ void irq_gc_ack_clr_bit(struct irq_data *d)
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void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->mask);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->ack);
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irq_reg_writel(mask, gc->reg_base + ct->regs.mask);
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irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
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irq_gc_unlock(gc);
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}
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@ -151,10 +153,11 @@ void irq_gc_mask_disable_reg_and_ack(struct irq_data *d)
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void irq_gc_eoi(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = 1 << (d->irq - gc->irq_base);
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irq_gc_lock(gc);
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irq_reg_writel(mask, gc->reg_base + cur_regs(d)->eoi);
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irq_reg_writel(mask, gc->reg_base + ct->regs.eoi);
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irq_gc_unlock(gc);
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}
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