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arm64: dts: renesas: Fix IOMMU device node names

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Fix IOMMU device node names as "iommu@".

Fixes: 8f507babc6 ("arm64: dts: renesas: r8a774a1: Add IPMMU device nodes")
Fixes: 63093a8e58 ("arm64: dts: renesas: r8a774b1: Add IPMMU device nodes")
Fixes: 6c7e02178e ("arm64: dts: renesas: r8a774c0: Add IPMMU device nodes")
Fixes: 3b7e7848f0 ("arm64: dts: renesas: r8a7795: Add IPMMU device nodes")
Fixes: e4b9a493df ("arm64: dts: renesas: r8a7795-es1: Add IPMMU device nodes")
Fixes: 389baa4096 ("arm64: dts: renesas: r8a7796: Add IPMMU device nodes")
Fixes: 55697cbb44 ("arm64: dts: renesas: r8a779{65,80,90}: Add IPMMU devices nodes")
Fixes: ce3b52a159 ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Fixes: a3901e7398 ("arm64: dts: renesas: r8a77995: Add IPMMU device nodes")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1587461775-13369-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Yoshihiro Shimoda 2020-04-21 18:36:15 +09:00 committed by Geert Uytterhoeven
parent ae990a1de0
commit cf8ae446bb
11 changed files with 105 additions and 105 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
arch/arm64/boot/dts/renesas/r8a774a1.dtsi
View File

@ -1000,7 +1000,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -1008,7 +1008,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -1016,7 +1016,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -1024,7 +1024,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -1033,7 +1033,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -1041,7 +1041,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 5>;
@ -1049,7 +1049,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_pv1: mmu@fd950000 {
ipmmu_pv1: iommu@fd950000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfd950000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -1057,7 +1057,7 @@ ipmmu_pv1: mmu@fd950000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>;
@ -1065,7 +1065,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a774a1";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 9>;

18
arch/arm64/boot/dts/renesas/r8a774b1.dtsi
View File

@ -874,7 +874,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -882,7 +882,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -890,7 +890,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -898,7 +898,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -907,7 +907,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -915,7 +915,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -923,7 +923,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -931,7 +931,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -939,7 +939,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a774b1";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;

18
arch/arm64/boot/dts/renesas/r8a774c0.dtsi
View File

@ -847,7 +847,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -855,7 +855,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -863,7 +863,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -871,7 +871,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -880,7 +880,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -888,7 +888,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -896,7 +896,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -904,7 +904,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -912,7 +912,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a774c0";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;

14
arch/arm64/boot/dts/renesas/r8a77950.dtsi
View File

@ -77,7 +77,7 @@ &soc {
/delete-node/ dma-controller@e6460000;
/delete-node/ dma-controller@e6470000;
ipmmu_mp1: mmu@ec680000 {
ipmmu_mp1: iommu@ec680000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xec680000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 5>;
@ -85,7 +85,7 @@ ipmmu_mp1: mmu@ec680000 {
#iommu-cells = <1>;
};
ipmmu_sy: mmu@e7730000 {
ipmmu_sy: iommu@e7730000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xe7730000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>;
@ -93,11 +93,11 @@ ipmmu_sy: mmu@e7730000 {
#iommu-cells = <1>;
};
/delete-node/ mmu@fd950000;
/delete-node/ mmu@fd960000;
/delete-node/ mmu@fd970000;
/delete-node/ mmu@febe0000;
/delete-node/ mmu@fe980000;
/delete-node/ iommu@fd950000;
/delete-node/ iommu@fd960000;
/delete-node/ iommu@fd970000;
/delete-node/ iommu@febe0000;
/delete-node/ iommu@fe980000;
xhci1: usb@ee040000 {
compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";

34
arch/arm64/boot/dts/renesas/r8a77951.dtsi
View File

@ -1073,7 +1073,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -1081,7 +1081,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -1089,7 +1089,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -1097,7 +1097,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
ipmmu_ir: iommu@ff8b0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
@ -1105,7 +1105,7 @@ ipmmu_ir: mmu@ff8b0000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -1114,7 +1114,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp0: mmu@ec670000 {
ipmmu_mp0: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -1122,7 +1122,7 @@ ipmmu_mp0: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -1130,7 +1130,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_pv1: mmu@fd950000 {
ipmmu_pv1: iommu@fd950000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfd950000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 7>;
@ -1138,7 +1138,7 @@ ipmmu_pv1: mmu@fd950000 {
#iommu-cells = <1>;
};
ipmmu_pv2: mmu@fd960000 {
ipmmu_pv2: iommu@fd960000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfd960000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>;
@ -1146,7 +1146,7 @@ ipmmu_pv2: mmu@fd960000 {
#iommu-cells = <1>;
};
ipmmu_pv3: mmu@fd970000 {
ipmmu_pv3: iommu@fd970000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfd970000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 9>;
@ -1154,7 +1154,7 @@ ipmmu_pv3: mmu@fd970000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
@ -1162,7 +1162,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -1170,7 +1170,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vc1: mmu@fe6f0000 {
ipmmu_vc1: iommu@fe6f0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfe6f0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 13>;
@ -1178,7 +1178,7 @@ ipmmu_vc1: mmu@fe6f0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -1186,7 +1186,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vi1: mmu@febe0000 {
ipmmu_vi1: iommu@febe0000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfebe0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 15>;
@ -1194,7 +1194,7 @@ ipmmu_vi1: mmu@febe0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
@ -1202,7 +1202,7 @@ ipmmu_vp0: mmu@fe990000 {
#iommu-cells = <1>;
};
ipmmu_vp1: mmu@fe980000 {
ipmmu_vp1: iommu@fe980000 {
compatible = "renesas,ipmmu-r8a7795";
reg = <0 0xfe980000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 17>;

22
arch/arm64/boot/dts/renesas/r8a77960.dtsi
View File

@ -997,7 +997,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -1005,7 +1005,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -1013,7 +1013,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -1021,7 +1021,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
ipmmu_ir: iommu@ff8b0000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
@ -1029,7 +1029,7 @@ ipmmu_ir: mmu@ff8b0000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -1038,7 +1038,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -1046,7 +1046,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 5>;
@ -1054,7 +1054,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_pv1: mmu@fd950000 {
ipmmu_pv1: iommu@fd950000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xfd950000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -1062,7 +1062,7 @@ ipmmu_pv1: mmu@fd950000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 7>;
@ -1070,7 +1070,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>;
@ -1078,7 +1078,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a7796";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 9>;

20
arch/arm64/boot/dts/renesas/r8a77965.dtsi
View File

@ -867,7 +867,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -875,7 +875,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -883,7 +883,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -891,7 +891,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -900,7 +900,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -908,7 +908,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -916,7 +916,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
@ -924,7 +924,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -932,7 +932,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -940,7 +940,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a77965";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;

10
arch/arm64/boot/dts/renesas/r8a77970.dtsi
View File

@ -985,7 +985,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -993,7 +993,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
ipmmu_ir: iommu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
@ -1001,7 +1001,7 @@ ipmmu_ir: mmu@ff8b0000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -1010,7 +1010,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 7>;
@ -1018,7 +1018,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 9>;

16
arch/arm64/boot/dts/renesas/r8a77980.dtsi
View File

@ -1266,7 +1266,7 @@ gether: ethernet@e7400000 {
status = "disabled";
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -1274,7 +1274,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_ir: mmu@ff8b0000 {
ipmmu_ir: iommu@ff8b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xff8b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 3>;
@ -1282,7 +1282,7 @@ ipmmu_ir: mmu@ff8b0000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -1291,7 +1291,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
@ -1299,7 +1299,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe990000 {
ipmmu_vc0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -1307,7 +1307,7 @@ ipmmu_vc0: mmu@fe990000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -1315,14 +1315,14 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vip0: mmu@e7b00000 {
ipmmu_vip0: iommu@e7b00000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7b00000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
ipmmu_vip1: mmu@e7960000 {
ipmmu_vip1: iommu@e7960000 {
compatible = "renesas,ipmmu-r8a77980";
reg = <0 0xe7960000 0 0x1000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;

20
arch/arm64/boot/dts/renesas/r8a77990.dtsi
View File

@ -817,7 +817,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -825,7 +825,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -833,7 +833,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -841,7 +841,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -850,7 +850,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -858,7 +858,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -866,7 +866,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
@ -874,7 +874,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -882,7 +882,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -890,7 +890,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a77990";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;

20
arch/arm64/boot/dts/renesas/r8a77995.dtsi
View File

@ -507,7 +507,7 @@ dmac2: dma-controller@e7310000 {
<&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
};
ipmmu_ds0: mmu@e6740000 {
ipmmu_ds0: iommu@e6740000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
@ -515,7 +515,7 @@ ipmmu_ds0: mmu@e6740000 {
#iommu-cells = <1>;
};
ipmmu_ds1: mmu@e7740000 {
ipmmu_ds1: iommu@e7740000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
@ -523,7 +523,7 @@ ipmmu_ds1: mmu@e7740000 {
#iommu-cells = <1>;
};
ipmmu_hc: mmu@e6570000 {
ipmmu_hc: iommu@e6570000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
@ -531,7 +531,7 @@ ipmmu_hc: mmu@e6570000 {
#iommu-cells = <1>;
};
ipmmu_mm: mmu@e67b0000 {
ipmmu_mm: iommu@e67b0000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xe67b0000 0 0x1000>;
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
@ -540,7 +540,7 @@ ipmmu_mm: mmu@e67b0000 {
#iommu-cells = <1>;
};
ipmmu_mp: mmu@ec670000 {
ipmmu_mp: iommu@ec670000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
@ -548,7 +548,7 @@ ipmmu_mp: mmu@ec670000 {
#iommu-cells = <1>;
};
ipmmu_pv0: mmu@fd800000 {
ipmmu_pv0: iommu@fd800000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
@ -556,7 +556,7 @@ ipmmu_pv0: mmu@fd800000 {
#iommu-cells = <1>;
};
ipmmu_rt: mmu@ffc80000 {
ipmmu_rt: iommu@ffc80000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
@ -564,7 +564,7 @@ ipmmu_rt: mmu@ffc80000 {
#iommu-cells = <1>;
};
ipmmu_vc0: mmu@fe6b0000 {
ipmmu_vc0: iommu@fe6b0000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
@ -572,7 +572,7 @@ ipmmu_vc0: mmu@fe6b0000 {
#iommu-cells = <1>;
};
ipmmu_vi0: mmu@febd0000 {
ipmmu_vi0: iommu@febd0000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
@ -580,7 +580,7 @@ ipmmu_vi0: mmu@febd0000 {
#iommu-cells = <1>;
};
ipmmu_vp0: mmu@fe990000 {
ipmmu_vp0: iommu@fe990000 {
compatible = "renesas,ipmmu-r8a77995";
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;