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net/mlx5: Introduce sniffer steering hardware capabilities
Define needed hardware capabilities for sniffer RX and TX flow tables. Add the following capabilities: 1. Sniffer RX flow table capabilities. 2. Sniffer TX flow table capabilities. 3. If same TIR can be used by multiple flow tables of different types. Signed-off-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org>
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@ -964,6 +964,18 @@ enum mlx5_cap_type {
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#define MLX5_CAP_FLOWTABLE_NIC_RX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_receive.cap)
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#define MLX5_CAP_FLOWTABLE_SNIFFER_RX(mdev, cap) \
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MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_receive_sniffer.cap)
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#define MLX5_CAP_FLOWTABLE_SNIFFER_RX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_receive_sniffer.cap)
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#define MLX5_CAP_FLOWTABLE_SNIFFER_TX(mdev, cap) \
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MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_transmit_sniffer.cap)
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#define MLX5_CAP_FLOWTABLE_SNIFFER_TX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_transmit_sniffer.cap)
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#define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \
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MLX5_GET(flow_table_eswitch_cap, \
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mdev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)
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@ -483,7 +483,9 @@ struct mlx5_ifc_ads_bits {
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struct mlx5_ifc_flow_table_nic_cap_bits {
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u8 nic_rx_multi_path_tirs[0x1];
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u8 reserved_at_1[0x1ff];
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u8 nic_rx_multi_path_tirs_fts[0x1];
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u8 allow_sniffer_and_nic_rx_shared_tir[0x1];
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u8 reserved_at_3[0x1fd];
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struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_receive;
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