mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 09:15:11 +07:00
Merge branch 'r8169-series-with-further-smaller-improvements'
Heiner Kallweit says: ==================== r8169: series with further smaller improvements Nothing too exciting. This series includes further smaller improvements. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
commit
ce7805513d
@ -212,7 +212,6 @@ enum rtl_registers {
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/* Unlimited maximum PCI burst. */
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#define RX_DMA_BURST (7 << RXCFG_DMA_SHIFT)
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RxMissed = 0x4c,
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Cfg9346 = 0x50,
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Config0 = 0x51,
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Config1 = 0x52,
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@ -576,6 +575,7 @@ struct rtl8169_tc_offsets {
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__le64 tx_errors;
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__le32 tx_multi_collision;
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__le16 tx_aborted;
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__le16 rx_missed;
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};
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enum rtl_flag {
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@ -689,6 +689,12 @@ static void rtl_unlock_config_regs(struct rtl8169_private *tp)
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RTL_W8(tp, Cfg9346, Cfg9346_Unlock);
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}
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static void rtl_pci_commit(struct rtl8169_private *tp)
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{
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/* Read an arbitrary register to commit a preceding PCI write */
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RTL_R8(tp, ChipCmd);
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}
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static bool rtl_is_8125(struct rtl8169_private *tp)
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{
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return tp->mac_version >= RTL_GIGA_MAC_VER_60;
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@ -1319,18 +1325,13 @@ static void rtl8169_irq_mask_and_ack(struct rtl8169_private *tp)
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{
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rtl_irq_disable(tp);
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rtl_ack_events(tp, 0xffffffff);
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/* PCI commit */
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RTL_R8(tp, ChipCmd);
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rtl_pci_commit(tp);
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}
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static void rtl_link_chg_patch(struct rtl8169_private *tp)
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{
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struct net_device *dev = tp->dev;
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struct phy_device *phydev = tp->phydev;
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if (!netif_running(dev))
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return;
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if (tp->mac_version == RTL_GIGA_MAC_VER_34 ||
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tp->mac_version == RTL_GIGA_MAC_VER_38) {
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if (phydev->speed == SPEED_1000) {
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@ -1536,7 +1537,7 @@ static int rtl8169_set_features(struct net_device *dev,
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}
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RTL_W16(tp, CPlusCmd, tp->cp_cmd);
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RTL_R16(tp, CPlusCmd);
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rtl_pci_commit(tp);
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rtl_unlock_work(tp);
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@ -1622,7 +1623,7 @@ static bool rtl8169_do_counters(struct rtl8169_private *tp, u32 counter_cmd)
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u32 cmd;
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RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
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RTL_R32(tp, CounterAddrHigh);
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rtl_pci_commit(tp);
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cmd = (u64)paddr & DMA_BIT_MASK(32);
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RTL_W32(tp, CounterAddrLow, cmd);
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RTL_W32(tp, CounterAddrLow, cmd | counter_cmd);
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@ -1689,6 +1690,7 @@ static bool rtl8169_init_counter_offsets(struct rtl8169_private *tp)
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tp->tc_offset.tx_errors = counters->tx_errors;
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tp->tc_offset.tx_multi_collision = counters->tx_multi_collision;
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tp->tc_offset.tx_aborted = counters->tx_aborted;
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tp->tc_offset.rx_missed = counters->rx_missed;
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tp->tc_offset.inited = true;
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return ret;
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@ -1946,7 +1948,7 @@ static int rtl_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec)
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tp->cp_cmd = (tp->cp_cmd & ~INTT_MASK) | cp01;
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RTL_W16(tp, CPlusCmd, tp->cp_cmd);
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RTL_R16(tp, CPlusCmd);
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rtl_pci_commit(tp);
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rtl_unlock_work(tp);
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@ -2044,7 +2046,7 @@ static void rtl_enable_eee(struct rtl8169_private *tp)
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phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv);
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}
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static void rtl8169_get_mac_version(struct rtl8169_private *tp)
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static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
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{
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/*
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* The driver currently handles the 8168Bf and the 8168Be identically
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@ -2060,7 +2062,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp)
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static const struct rtl_mac_info {
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u16 mask;
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u16 val;
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u16 mac_version;
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enum mac_version ver;
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} mac_info[] = {
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/* 8125 family. */
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{ 0x7cf, 0x608, RTL_GIGA_MAC_VER_60 },
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@ -2147,22 +2149,22 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp)
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{ 0x000, 0x000, RTL_GIGA_MAC_NONE }
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};
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const struct rtl_mac_info *p = mac_info;
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u16 reg = RTL_R32(tp, TxConfig) >> 20;
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enum mac_version ver;
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while ((reg & p->mask) != p->val)
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while ((xid & p->mask) != p->val)
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p++;
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tp->mac_version = p->mac_version;
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ver = p->ver;
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if (tp->mac_version == RTL_GIGA_MAC_NONE) {
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dev_err(tp_to_dev(tp), "unknown chip XID %03x\n", reg & 0xfcf);
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} else if (!tp->supports_gmii) {
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if (tp->mac_version == RTL_GIGA_MAC_VER_42)
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tp->mac_version = RTL_GIGA_MAC_VER_43;
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else if (tp->mac_version == RTL_GIGA_MAC_VER_45)
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tp->mac_version = RTL_GIGA_MAC_VER_47;
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else if (tp->mac_version == RTL_GIGA_MAC_VER_46)
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tp->mac_version = RTL_GIGA_MAC_VER_48;
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if (ver != RTL_GIGA_MAC_NONE && !gmii) {
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if (ver == RTL_GIGA_MAC_VER_42)
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ver = RTL_GIGA_MAC_VER_43;
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else if (ver == RTL_GIGA_MAC_VER_45)
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ver = RTL_GIGA_MAC_VER_47;
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else if (ver == RTL_GIGA_MAC_VER_46)
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ver = RTL_GIGA_MAC_VER_48;
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}
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return ver;
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}
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static void rtl_release_firmware(struct rtl8169_private *tp)
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@ -2264,10 +2266,10 @@ static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
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rtl_unlock_config_regs(tp);
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RTL_W32(tp, MAC4, addr[4] | addr[5] << 8);
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RTL_R32(tp, MAC4);
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rtl_pci_commit(tp);
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RTL_W32(tp, MAC0, addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
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RTL_R32(tp, MAC0);
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rtl_pci_commit(tp);
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if (tp->mac_version == RTL_GIGA_MAC_VER_34)
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rtl_rar_exgmac_set(tp, addr);
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@ -2471,66 +2473,52 @@ static void r8168b_1_hw_jumbo_disable(struct rtl8169_private *tp)
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RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
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}
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static void rtl_hw_jumbo_enable(struct rtl8169_private *tp)
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static void rtl_jumbo_config(struct rtl8169_private *tp)
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{
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rtl_unlock_config_regs(tp);
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_12:
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case RTL_GIGA_MAC_VER_17:
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pcie_set_readrq(tp->pci_dev, 512);
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r8168b_1_hw_jumbo_enable(tp);
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break;
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case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
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pcie_set_readrq(tp->pci_dev, 512);
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r8168c_hw_jumbo_enable(tp);
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break;
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case RTL_GIGA_MAC_VER_27 ... RTL_GIGA_MAC_VER_28:
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r8168dp_hw_jumbo_enable(tp);
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break;
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case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
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pcie_set_readrq(tp->pci_dev, 512);
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r8168e_hw_jumbo_enable(tp);
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break;
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default:
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break;
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}
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rtl_lock_config_regs(tp);
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}
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bool jumbo = tp->dev->mtu > ETH_DATA_LEN;
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static void rtl_hw_jumbo_disable(struct rtl8169_private *tp)
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{
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rtl_unlock_config_regs(tp);
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switch (tp->mac_version) {
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case RTL_GIGA_MAC_VER_12:
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case RTL_GIGA_MAC_VER_17:
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r8168b_1_hw_jumbo_disable(tp);
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if (jumbo) {
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pcie_set_readrq(tp->pci_dev, 512);
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r8168b_1_hw_jumbo_enable(tp);
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} else {
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r8168b_1_hw_jumbo_disable(tp);
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}
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break;
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case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_26:
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r8168c_hw_jumbo_disable(tp);
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if (jumbo) {
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pcie_set_readrq(tp->pci_dev, 512);
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r8168c_hw_jumbo_enable(tp);
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} else {
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r8168c_hw_jumbo_disable(tp);
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}
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break;
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case RTL_GIGA_MAC_VER_27 ... RTL_GIGA_MAC_VER_28:
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r8168dp_hw_jumbo_disable(tp);
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if (jumbo)
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r8168dp_hw_jumbo_enable(tp);
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else
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r8168dp_hw_jumbo_disable(tp);
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break;
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case RTL_GIGA_MAC_VER_31 ... RTL_GIGA_MAC_VER_33:
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r8168e_hw_jumbo_disable(tp);
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if (jumbo) {
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pcie_set_readrq(tp->pci_dev, 512);
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r8168e_hw_jumbo_enable(tp);
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} else {
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r8168e_hw_jumbo_disable(tp);
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}
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break;
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default:
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break;
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}
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rtl_lock_config_regs(tp);
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if (pci_is_pcie(tp->pci_dev) && tp->supports_gmii)
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if (!jumbo && pci_is_pcie(tp->pci_dev) && tp->supports_gmii)
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pcie_set_readrq(tp->pci_dev, 4096);
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}
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static void rtl_jumbo_config(struct rtl8169_private *tp, int mtu)
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{
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if (mtu > ETH_DATA_LEN)
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rtl_hw_jumbo_enable(tp);
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else
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rtl_hw_jumbo_disable(tp);
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}
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DECLARE_RTL_COND(rtl_chipcmd_cond)
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{
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return RTL_R8(tp, ChipCmd) & CmdReset;
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@ -3838,9 +3826,6 @@ static void rtl_hw_start_8168(struct rtl8169_private *tp)
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static void rtl_hw_start_8169(struct rtl8169_private *tp)
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{
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if (tp->mac_version == RTL_GIGA_MAC_VER_05)
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pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
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RTL_W8(tp, EarlyTxThres, NoEarlyTx);
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tp->cp_cmd |= PCIMulRW;
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@ -3853,8 +3838,6 @@ static void rtl_hw_start_8169(struct rtl8169_private *tp)
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rtl8169_set_magic_reg(tp, tp->mac_version);
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RTL_W32(tp, RxMissed, 0);
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/* disable interrupt coalescing */
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RTL_W16(tp, IntrMitigate, 0x0000);
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}
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@ -3877,10 +3860,11 @@ static void rtl_hw_start(struct rtl8169_private *tp)
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rtl_set_rx_tx_desc_registers(tp);
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rtl_lock_config_regs(tp);
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rtl_jumbo_config(tp, tp->dev->mtu);
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rtl_jumbo_config(tp);
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/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
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RTL_R16(tp, CPlusCmd);
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rtl_pci_commit(tp);
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RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
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rtl_init_rxcfg(tp);
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rtl_set_tx_config_registers(tp);
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@ -3892,10 +3876,9 @@ static int rtl8169_change_mtu(struct net_device *dev, int new_mtu)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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rtl_jumbo_config(tp, new_mtu);
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dev->mtu = new_mtu;
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netdev_update_features(dev);
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rtl_jumbo_config(tp);
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return 0;
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}
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@ -4697,17 +4680,6 @@ static int rtl8169_poll(struct napi_struct *napi, int budget)
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return work_done;
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}
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static void rtl8169_rx_missed(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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if (tp->mac_version > RTL_GIGA_MAC_VER_06)
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return;
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dev->stats.rx_missed_errors += RTL_R32(tp, RxMissed) & 0xffffff;
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RTL_W32(tp, RxMissed, 0);
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}
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static void r8169_phylink_handler(struct net_device *ndev)
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{
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struct rtl8169_private *tp = netdev_priv(ndev);
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@ -4757,12 +4729,6 @@ static void rtl8169_down(struct net_device *dev)
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netif_stop_queue(dev);
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rtl8169_hw_reset(tp);
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/*
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* At this point device interrupts can not be enabled in any function,
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* as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task)
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* and napi is disabled (rtl8169_poll).
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*/
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rtl8169_rx_missed(dev);
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/* Give a racing hard_start_xmit a few cycles to complete. */
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synchronize_rcu();
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@ -4907,9 +4873,6 @@ rtl8169_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
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pm_runtime_get_noresume(&pdev->dev);
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if (netif_running(dev) && pm_runtime_active(&pdev->dev))
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rtl8169_rx_missed(dev);
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do {
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start = u64_stats_fetch_begin_irq(&tp->rx_stats.syncp);
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stats->rx_packets = tp->rx_stats.packets;
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@ -4928,7 +4891,6 @@ rtl8169_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
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stats->rx_errors = dev->stats.rx_errors;
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stats->rx_crc_errors = dev->stats.rx_crc_errors;
|
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stats->rx_fifo_errors = dev->stats.rx_fifo_errors;
|
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stats->rx_missed_errors = dev->stats.rx_missed_errors;
|
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stats->multicast = dev->stats.multicast;
|
||||
|
||||
/*
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@ -4948,6 +4910,8 @@ rtl8169_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
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le32_to_cpu(tp->tc_offset.tx_multi_collision);
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stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) -
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le16_to_cpu(tp->tc_offset.tx_aborted);
|
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stats->rx_missed_errors = le16_to_cpu(counters->rx_missed) -
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le16_to_cpu(tp->tc_offset.rx_missed);
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|
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pm_runtime_put_noidle(&pdev->dev);
|
||||
}
|
||||
@ -5033,7 +4997,6 @@ static int rtl8169_runtime_suspend(struct device *device)
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rtl8169_net_suspend(dev);
|
||||
|
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/* Update counters before going runtime suspend */
|
||||
rtl8169_rx_missed(dev);
|
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rtl8169_update_counters(tp);
|
||||
|
||||
return 0;
|
||||
@ -5098,8 +5061,7 @@ static void rtl_wol_shutdown_quirk(struct rtl8169_private *tp)
|
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pci_clear_master(tp->pci_dev);
|
||||
|
||||
RTL_W8(tp, ChipCmd, CmdRxEnb);
|
||||
/* PCI commit */
|
||||
RTL_R8(tp, ChipCmd);
|
||||
rtl_pci_commit(tp);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@ -5442,9 +5404,10 @@ static void rtl_init_mac_address(struct rtl8169_private *tp)
|
||||
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
{
|
||||
struct rtl8169_private *tp;
|
||||
int jumbo_max, region, rc;
|
||||
enum mac_version chipset;
|
||||
struct net_device *dev;
|
||||
int chipset, region;
|
||||
int jumbo_max, rc;
|
||||
u16 xid;
|
||||
|
||||
/* Some tools for creating an initramfs don't consider softdeps, then
|
||||
* r8169.ko may be in initramfs, but realtek.ko not. Then the generic
|
||||
@ -5511,10 +5474,16 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
tp->mmio_addr = pcim_iomap_table(pdev)[region];
|
||||
|
||||
xid = (RTL_R32(tp, TxConfig) >> 20) & 0xfcf;
|
||||
|
||||
/* Identify chip attached to board */
|
||||
rtl8169_get_mac_version(tp);
|
||||
if (tp->mac_version == RTL_GIGA_MAC_NONE)
|
||||
chipset = rtl8169_get_mac_version(xid, tp->supports_gmii);
|
||||
if (chipset == RTL_GIGA_MAC_NONE) {
|
||||
dev_err(&pdev->dev, "unknown chip XID %03x\n", xid);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
tp->mac_version = chipset;
|
||||
|
||||
tp->cp_cmd = RTL_R16(tp, CPlusCmd);
|
||||
|
||||
@ -5532,8 +5501,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
chipset = tp->mac_version;
|
||||
|
||||
rc = rtl_alloc_irq(tp);
|
||||
if (rc < 0) {
|
||||
dev_err(&pdev->dev, "Can't allocate interrupt\n");
|
||||
@ -5551,9 +5518,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
netif_napi_add(dev, &tp->napi, rtl8169_poll, NAPI_POLL_WEIGHT);
|
||||
|
||||
dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
|
||||
NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX |
|
||||
NETIF_F_HW_VLAN_CTAG_RX;
|
||||
dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
|
||||
NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX |
|
||||
NETIF_F_HW_VLAN_CTAG_RX;
|
||||
@ -5575,7 +5539,6 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
|
||||
if (rtl_chip_supports_csum_v2(tp)) {
|
||||
dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
|
||||
dev->features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
|
||||
dev->gso_max_size = RTL_GSO_MAX_SIZE_V2;
|
||||
dev->gso_max_segs = RTL_GSO_MAX_SEGS_V2;
|
||||
} else {
|
||||
@ -5590,9 +5553,10 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
tp->mac_version == RTL_GIGA_MAC_VER_22) {
|
||||
dev->vlan_features &= ~(NETIF_F_ALL_TSO | NETIF_F_SG);
|
||||
dev->hw_features &= ~(NETIF_F_ALL_TSO | NETIF_F_SG);
|
||||
dev->features &= ~(NETIF_F_ALL_TSO | NETIF_F_SG);
|
||||
}
|
||||
|
||||
dev->features |= dev->hw_features;
|
||||
|
||||
dev->hw_features |= NETIF_F_RXALL;
|
||||
dev->hw_features |= NETIF_F_RXFCS;
|
||||
|
||||
@ -5624,8 +5588,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
goto err_mdio_unregister;
|
||||
|
||||
netif_info(tp, probe, dev, "%s, %pM, XID %03x, IRQ %d\n",
|
||||
rtl_chip_infos[chipset].name, dev->dev_addr,
|
||||
(RTL_R32(tp, TxConfig) >> 20) & 0xfcf,
|
||||
rtl_chip_infos[chipset].name, dev->dev_addr, xid,
|
||||
pci_irq_vector(pdev, 0));
|
||||
|
||||
if (jumbo_max)
|
||||
|
Loading…
Reference in New Issue
Block a user