mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 10:30:52 +07:00
sparc: remove the sparc32_dma_ops indirection
There is no good reason to have a double indirection for the sparc32 dma ops, so remove the sparc32_dma_ops and define separate dma_map_ops instance for the different IOMMU types. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Christoph Hellwig
parent
53b7670e57
commit
ce65d36f3e
@ -91,54 +91,10 @@ extern int isa_dma_bridge_buggy;
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#endif
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#ifdef CONFIG_SPARC32
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/* Routines for data transfer buffers. */
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struct device;
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struct scatterlist;
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struct sparc32_dma_ops {
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__u32 (*get_scsi_one)(struct device *, char *, unsigned long);
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void (*get_scsi_sgl)(struct device *, struct scatterlist *, int);
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void (*release_scsi_one)(struct device *, __u32, unsigned long);
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void (*release_scsi_sgl)(struct device *, struct scatterlist *,int);
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#ifdef CONFIG_SBUS
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int (*map_dma_area)(struct device *, dma_addr_t *, unsigned long, unsigned long, int);
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void (*unmap_dma_area)(struct device *, unsigned long, int);
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#endif
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};
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extern const struct sparc32_dma_ops *sparc32_dma_ops;
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#define mmu_get_scsi_one(dev,vaddr,len) \
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sparc32_dma_ops->get_scsi_one(dev, vaddr, len)
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#define mmu_get_scsi_sgl(dev,sg,sz) \
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sparc32_dma_ops->get_scsi_sgl(dev, sg, sz)
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#define mmu_release_scsi_one(dev,vaddr,len) \
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sparc32_dma_ops->release_scsi_one(dev, vaddr,len)
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#define mmu_release_scsi_sgl(dev,sg,sz) \
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sparc32_dma_ops->release_scsi_sgl(dev, sg, sz)
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#ifdef CONFIG_SBUS
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/*
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* mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep.
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*
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* The mmu_map_dma_area establishes two mappings in one go.
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* These mappings point to pages normally mapped at 'va' (linear address).
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* First mapping is for CPU visible address at 'a', uncached.
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* This is an alias, but it works because it is an uncached mapping.
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* Second mapping is for device visible address, or "bus" address.
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* The bus address is returned at '*pba'.
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*
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* These functions seem distinct, but are hard to split.
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* On sun4m, page attributes depend on the CPU type, so we have to
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* know if we are mapping RAM or I/O, so it has to be an additional argument
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* to a separate mapping function for CPU visible mappings.
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*/
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#define sbus_map_dma_area(dev,pba,va,a,len) \
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sparc32_dma_ops->map_dma_area(dev, pba, va, a, len)
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#define sbus_unmap_dma_area(dev,ba,len) \
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sparc32_dma_ops->unmap_dma_area(dev, ba, len)
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#endif /* CONFIG_SBUS */
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unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len);
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bool sparc_dma_free_resource(void *cpu_addr, size_t size);
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#endif
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#endif /* !(_ASM_SPARC_DMA_H) */
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@ -52,8 +52,6 @@
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#include <asm/io-unit.h>
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#include <asm/leon.h>
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const struct sparc32_dma_ops *sparc32_dma_ops;
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/* This function must make sure that caches and memory are coherent after DMA
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* On LEON systems without cache snooping it flushes the entire D-CACHE.
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*/
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@ -247,7 +245,7 @@ static void _sparc_free_io(struct resource *res)
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release_resource(res);
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}
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static unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len)
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unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len)
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{
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struct resource *res;
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@ -266,7 +264,7 @@ static unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len)
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return res->start;
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}
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static bool sparc_dma_free_resource(void *cpu_addr, size_t size)
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bool sparc_dma_free_resource(void *cpu_addr, size_t size)
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{
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unsigned long addr = (unsigned long)cpu_addr;
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struct resource *res;
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@ -302,122 +300,6 @@ void sbus_set_sbus64(struct device *dev, int x)
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}
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EXPORT_SYMBOL(sbus_set_sbus64);
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/*
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* Allocate a chunk of memory suitable for DMA.
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* Typically devices use them for control blocks.
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* CPU may access them without any explicit flushing.
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*/
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static void *sbus_alloc_coherent(struct device *dev, size_t len,
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dma_addr_t *dma_addrp, gfp_t gfp,
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unsigned long attrs)
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{
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unsigned long len_total = PAGE_ALIGN(len);
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unsigned long va, addr;
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int order;
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/* XXX why are some lengths signed, others unsigned? */
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if (len <= 0) {
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return NULL;
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}
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (len > 256*1024) { /* __get_free_pages() limit */
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return NULL;
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}
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order = get_order(len_total);
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va = __get_free_pages(gfp, order);
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if (va == 0)
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goto err_nopages;
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addr = sparc_dma_alloc_resource(dev, len_total);
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if (!addr)
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goto err_nomem;
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// XXX The sbus_map_dma_area does this for us below, see comments.
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// srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
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/*
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* XXX That's where sdev would be used. Currently we load
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* all iommu tables with the same translations.
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*/
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if (sbus_map_dma_area(dev, dma_addrp, va, addr, len_total) != 0)
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goto err_noiommu;
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return (void *)addr;
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err_noiommu:
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sparc_dma_free_resource((void *)addr, len_total);
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err_nomem:
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free_pages(va, order);
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err_nopages:
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return NULL;
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}
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static void sbus_free_coherent(struct device *dev, size_t n, void *p,
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dma_addr_t ba, unsigned long attrs)
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{
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struct page *pgv;
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n = PAGE_ALIGN(n);
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if (!sparc_dma_free_resource(p, n))
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return;
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pgv = virt_to_page(p);
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sbus_unmap_dma_area(dev, ba, n);
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__free_pages(pgv, get_order(n));
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}
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/*
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* Map a chunk of memory so that devices can see it.
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* CPU view of this memory may be inconsistent with
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* a device view and explicit flushing is necessary.
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*/
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static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t len,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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void *va = page_address(page) + offset;
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/* XXX why are some lengths signed, others unsigned? */
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if (len <= 0) {
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return 0;
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}
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (len > 256*1024) { /* __get_free_pages() limit */
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return 0;
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}
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return mmu_get_scsi_one(dev, va, len);
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}
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static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
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enum dma_data_direction dir, unsigned long attrs)
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{
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mmu_release_scsi_one(dev, ba, n);
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}
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static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
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enum dma_data_direction dir, unsigned long attrs)
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{
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mmu_get_scsi_sgl(dev, sg, n);
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return n;
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}
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static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
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enum dma_data_direction dir, unsigned long attrs)
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{
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mmu_release_scsi_sgl(dev, sg, n);
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}
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static const struct dma_map_ops sbus_dma_ops = {
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.alloc = sbus_alloc_coherent,
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.free = sbus_free_coherent,
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.map_page = sbus_map_page,
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.unmap_page = sbus_unmap_page,
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.map_sg = sbus_map_sg,
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.unmap_sg = sbus_unmap_sg,
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};
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static int __init sparc_register_ioport(void)
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{
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register_proc_sparc_ioport();
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@ -491,7 +373,7 @@ void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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dma_make_coherent(paddr, PAGE_ALIGN(size));
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}
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const struct dma_map_ops *dma_ops = &sbus_dma_ops;
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const struct dma_map_ops *dma_ops;
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EXPORT_SYMBOL(dma_ops);
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#ifdef CONFIG_PROC_FS
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@ -12,7 +12,7 @@
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#include <linux/mm.h>
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#include <linux/highmem.h> /* pte_offset_map => kmap_atomic */
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#include <linux/bitops.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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@ -140,18 +140,26 @@ nexti: scan = find_next_zero_bit(iounit->bmap, limit, scan);
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return vaddr;
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}
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static __u32 iounit_get_scsi_one(struct device *dev, char *vaddr, unsigned long len)
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static dma_addr_t iounit_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t len, enum dma_data_direction dir,
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unsigned long attrs)
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{
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void *vaddr = page_address(page) + offset;
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long ret, flags;
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (!len || len > 256 * 1024)
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return DMA_MAPPING_ERROR;
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spin_lock_irqsave(&iounit->lock, flags);
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ret = iounit_get_area(iounit, (unsigned long)vaddr, len);
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spin_unlock_irqrestore(&iounit->lock, flags);
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return ret;
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}
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static void iounit_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz)
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static int iounit_map_sg(struct device *dev, struct scatterlist *sg, int sz,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long flags;
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@ -165,9 +173,11 @@ static void iounit_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int
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sg = sg_next(sg);
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}
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spin_unlock_irqrestore(&iounit->lock, flags);
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return sz;
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}
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static void iounit_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len)
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static void iounit_unmap_page(struct device *dev, dma_addr_t vaddr, size_t len,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long flags;
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@ -181,7 +191,8 @@ static void iounit_release_scsi_one(struct device *dev, __u32 vaddr, unsigned lo
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spin_unlock_irqrestore(&iounit->lock, flags);
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}
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static void iounit_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz)
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static void iounit_unmap_sg(struct device *dev, struct scatterlist *sg, int sz,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long flags;
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@ -201,14 +212,27 @@ static void iounit_release_scsi_sgl(struct device *dev, struct scatterlist *sg,
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}
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#ifdef CONFIG_SBUS
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static int iounit_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, unsigned long addr, int len)
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static void *iounit_alloc(struct device *dev, size_t len,
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dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
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{
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struct iounit_struct *iounit = dev->archdata.iommu;
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unsigned long page, end;
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unsigned long va, addr, page, end, ret;
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pgprot_t dvma_prot;
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iopte_t __iomem *iopte;
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*pba = addr;
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (!len || len > 256 * 1024)
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return NULL;
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len = PAGE_ALIGN(len);
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va = __get_free_pages(gfp, get_order(len));
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if (!va)
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return NULL;
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addr = ret = sparc_dma_alloc_resource(dev, len);
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if (!addr)
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goto out_free_pages;
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*dma_handle = addr;
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dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV);
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end = PAGE_ALIGN((addr + len));
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@ -237,27 +261,32 @@ static int iounit_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned lon
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flush_cache_all();
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flush_tlb_all();
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return 0;
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return (void *)ret;
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out_free_pages:
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free_pages(va, get_order(len));
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return NULL;
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}
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static void iounit_unmap_dma_area(struct device *dev, unsigned long addr, int len)
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static void iounit_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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/* XXX Somebody please fill this in */
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}
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#endif
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static const struct sparc32_dma_ops iounit_dma_ops = {
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.get_scsi_one = iounit_get_scsi_one,
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.get_scsi_sgl = iounit_get_scsi_sgl,
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.release_scsi_one = iounit_release_scsi_one,
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.release_scsi_sgl = iounit_release_scsi_sgl,
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static const struct dma_map_ops iounit_dma_ops = {
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#ifdef CONFIG_SBUS
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.map_dma_area = iounit_map_dma_area,
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.unmap_dma_area = iounit_unmap_dma_area,
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.alloc = iounit_alloc,
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.free = iounit_free,
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#endif
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.map_page = iounit_map_page,
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.unmap_page = iounit_unmap_page,
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.map_sg = iounit_map_sg,
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.unmap_sg = iounit_unmap_sg,
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};
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void __init ld_mmu_iounit(void)
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{
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sparc32_dma_ops = &iounit_dma_ops;
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dma_ops = &iounit_dma_ops;
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}
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@ -13,7 +13,7 @@
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/highmem.h> /* pte_offset_map => kmap_atomic */
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#include <linux/scatterlist.h>
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#include <linux/dma-mapping.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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@ -205,38 +205,44 @@ static u32 iommu_get_one(struct device *dev, struct page *page, int npages)
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return busa0;
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}
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static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len)
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static dma_addr_t __sbus_iommu_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t len)
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{
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unsigned long off;
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int npages;
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struct page *page;
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u32 busa;
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off = (unsigned long)vaddr & ~PAGE_MASK;
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npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT;
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page = virt_to_page((unsigned long)vaddr & PAGE_MASK);
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busa = iommu_get_one(dev, page, npages);
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return busa + off;
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void *vaddr = page_address(page) + offset;
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unsigned long off = (unsigned long)vaddr & ~PAGE_MASK;
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unsigned long npages = (off + len + PAGE_SIZE - 1) >> PAGE_SHIFT;
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (!len || len > 256 * 1024)
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return DMA_MAPPING_ERROR;
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return iommu_get_one(dev, virt_to_page(vaddr), npages) + off;
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}
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static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len)
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static dma_addr_t sbus_iommu_map_page_gflush(struct device *dev,
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struct page *page, unsigned long offset, size_t len,
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enum dma_data_direction dir, unsigned long attrs)
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{
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flush_page_for_dma(0);
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return iommu_get_scsi_one(dev, vaddr, len);
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return __sbus_iommu_map_page(dev, page, offset, len);
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}
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static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned long len)
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static dma_addr_t sbus_iommu_map_page_pflush(struct device *dev,
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struct page *page, unsigned long offset, size_t len,
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enum dma_data_direction dir, unsigned long attrs)
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{
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unsigned long page = ((unsigned long) vaddr) & PAGE_MASK;
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void *vaddr = page_address(page) + offset;
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unsigned long p = ((unsigned long)vaddr) & PAGE_MASK;
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while(page < ((unsigned long)(vaddr + len))) {
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flush_page_for_dma(page);
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page += PAGE_SIZE;
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while (p < (unsigned long)vaddr + len) {
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flush_page_for_dma(p);
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p += PAGE_SIZE;
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}
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return iommu_get_scsi_one(dev, vaddr, len);
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||||
|
||||
return __sbus_iommu_map_page(dev, page, offset, len);
|
||||
}
|
||||
|
||||
static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz)
|
||||
static int sbus_iommu_map_sg_gflush(struct device *dev, struct scatterlist *sg,
|
||||
int sz, enum dma_data_direction dir, unsigned long attrs)
|
||||
{
|
||||
int n;
|
||||
|
||||
@ -248,9 +254,12 @@ static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg
|
||||
sg->dma_length = sg->length;
|
||||
sg = sg_next(sg);
|
||||
}
|
||||
|
||||
return sz;
|
||||
}
|
||||
|
||||
static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg, int sz)
|
||||
static int sbus_iommu_map_sg_pflush(struct device *dev, struct scatterlist *sg,
|
||||
int sz, enum dma_data_direction dir, unsigned long attrs)
|
||||
{
|
||||
unsigned long page, oldpage = 0;
|
||||
int n, i;
|
||||
@ -279,6 +288,8 @@ static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg
|
||||
sg->dma_length = sg->length;
|
||||
sg = sg_next(sg);
|
||||
}
|
||||
|
||||
return sz;
|
||||
}
|
||||
|
||||
static void iommu_release_one(struct device *dev, u32 busa, int npages)
|
||||
@ -297,23 +308,23 @@ static void iommu_release_one(struct device *dev, u32 busa, int npages)
|
||||
bit_map_clear(&iommu->usemap, ioptex, npages);
|
||||
}
|
||||
|
||||
static void iommu_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len)
|
||||
static void sbus_iommu_unmap_page(struct device *dev, dma_addr_t dma_addr,
|
||||
size_t len, enum dma_data_direction dir, unsigned long attrs)
|
||||
{
|
||||
unsigned long off;
|
||||
unsigned long off = dma_addr & ~PAGE_MASK;
|
||||
int npages;
|
||||
|
||||
off = vaddr & ~PAGE_MASK;
|
||||
npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT;
|
||||
iommu_release_one(dev, vaddr & PAGE_MASK, npages);
|
||||
iommu_release_one(dev, dma_addr & PAGE_MASK, npages);
|
||||
}
|
||||
|
||||
static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz)
|
||||
static void sbus_iommu_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int sz, enum dma_data_direction dir, unsigned long attrs)
|
||||
{
|
||||
int n;
|
||||
|
||||
while(sz != 0) {
|
||||
--sz;
|
||||
|
||||
n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT;
|
||||
iommu_release_one(dev, sg->dma_address & PAGE_MASK, n);
|
||||
sg->dma_address = 0x21212121;
|
||||
@ -322,15 +333,28 @@ static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, i
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SBUS
|
||||
static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va,
|
||||
unsigned long addr, int len)
|
||||
static void *sbus_iommu_alloc(struct device *dev, size_t len,
|
||||
dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
|
||||
{
|
||||
struct iommu_struct *iommu = dev->archdata.iommu;
|
||||
unsigned long page, end;
|
||||
unsigned long va, addr, page, end, ret;
|
||||
iopte_t *iopte = iommu->page_table;
|
||||
iopte_t *first;
|
||||
int ioptex;
|
||||
|
||||
/* XXX So what is maxphys for us and how do drivers know it? */
|
||||
if (!len || len > 256 * 1024)
|
||||
return NULL;
|
||||
|
||||
len = PAGE_ALIGN(len);
|
||||
va = __get_free_pages(gfp, get_order(len));
|
||||
if (va == 0)
|
||||
return NULL;
|
||||
|
||||
addr = ret = sparc_dma_alloc_resource(dev, len);
|
||||
if (!addr)
|
||||
goto out_free_pages;
|
||||
|
||||
BUG_ON((va & ~PAGE_MASK) != 0);
|
||||
BUG_ON((addr & ~PAGE_MASK) != 0);
|
||||
BUG_ON((len & ~PAGE_MASK) != 0);
|
||||
@ -385,16 +409,25 @@ static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long
|
||||
flush_tlb_all();
|
||||
iommu_invalidate(iommu->regs);
|
||||
|
||||
*pba = iommu->start + (ioptex << PAGE_SHIFT);
|
||||
return 0;
|
||||
*dma_handle = iommu->start + (ioptex << PAGE_SHIFT);
|
||||
return (void *)ret;
|
||||
|
||||
out_free_pages:
|
||||
free_pages(va, get_order(len));
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len)
|
||||
static void sbus_iommu_free(struct device *dev, size_t len, void *cpu_addr,
|
||||
dma_addr_t busa, unsigned long attrs)
|
||||
{
|
||||
struct iommu_struct *iommu = dev->archdata.iommu;
|
||||
iopte_t *iopte = iommu->page_table;
|
||||
unsigned long end;
|
||||
struct page *page = virt_to_page(cpu_addr);
|
||||
int ioptex = (busa - iommu->start) >> PAGE_SHIFT;
|
||||
unsigned long end;
|
||||
|
||||
if (!sparc_dma_free_resource(cpu_addr, len))
|
||||
return;
|
||||
|
||||
BUG_ON((busa & ~PAGE_MASK) != 0);
|
||||
BUG_ON((len & ~PAGE_MASK) != 0);
|
||||
@ -408,38 +441,40 @@ static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len
|
||||
flush_tlb_all();
|
||||
iommu_invalidate(iommu->regs);
|
||||
bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT);
|
||||
|
||||
__free_pages(page, get_order(len));
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct sparc32_dma_ops iommu_dma_gflush_ops = {
|
||||
.get_scsi_one = iommu_get_scsi_one_gflush,
|
||||
.get_scsi_sgl = iommu_get_scsi_sgl_gflush,
|
||||
.release_scsi_one = iommu_release_scsi_one,
|
||||
.release_scsi_sgl = iommu_release_scsi_sgl,
|
||||
static const struct dma_map_ops sbus_iommu_dma_gflush_ops = {
|
||||
#ifdef CONFIG_SBUS
|
||||
.map_dma_area = iommu_map_dma_area,
|
||||
.unmap_dma_area = iommu_unmap_dma_area,
|
||||
.alloc = sbus_iommu_alloc,
|
||||
.free = sbus_iommu_free,
|
||||
#endif
|
||||
.map_page = sbus_iommu_map_page_gflush,
|
||||
.unmap_page = sbus_iommu_unmap_page,
|
||||
.map_sg = sbus_iommu_map_sg_gflush,
|
||||
.unmap_sg = sbus_iommu_unmap_sg,
|
||||
};
|
||||
|
||||
static const struct sparc32_dma_ops iommu_dma_pflush_ops = {
|
||||
.get_scsi_one = iommu_get_scsi_one_pflush,
|
||||
.get_scsi_sgl = iommu_get_scsi_sgl_pflush,
|
||||
.release_scsi_one = iommu_release_scsi_one,
|
||||
.release_scsi_sgl = iommu_release_scsi_sgl,
|
||||
static const struct dma_map_ops sbus_iommu_dma_pflush_ops = {
|
||||
#ifdef CONFIG_SBUS
|
||||
.map_dma_area = iommu_map_dma_area,
|
||||
.unmap_dma_area = iommu_unmap_dma_area,
|
||||
.alloc = sbus_iommu_alloc,
|
||||
.free = sbus_iommu_free,
|
||||
#endif
|
||||
.map_page = sbus_iommu_map_page_pflush,
|
||||
.unmap_page = sbus_iommu_unmap_page,
|
||||
.map_sg = sbus_iommu_map_sg_pflush,
|
||||
.unmap_sg = sbus_iommu_unmap_sg,
|
||||
};
|
||||
|
||||
void __init ld_mmu_iommu(void)
|
||||
{
|
||||
if (flush_page_for_dma_global) {
|
||||
/* flush_page_for_dma flushes everything, no matter of what page is it */
|
||||
sparc32_dma_ops = &iommu_dma_gflush_ops;
|
||||
dma_ops = &sbus_iommu_dma_gflush_ops;
|
||||
} else {
|
||||
sparc32_dma_ops = &iommu_dma_pflush_ops;
|
||||
dma_ops = &sbus_iommu_dma_pflush_ops;
|
||||
}
|
||||
|
||||
if (viking_mxcc_present || srmmu_modtype == HyperSparc) {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user