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drm/amd/powerplay: drop redundant .set_min_dcefclk_deep_sleep API (v2)

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It has exactly the same functionality as .set_deep_sleep_dcefclk.

V2: correct the macro name for better trace

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan 2020-06-08 19:31:03 +08:00 committed by Alex Deucher
parent 282fd22b46
commit ce63d8f8b5
8 changed files with 13 additions and 30 deletions
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11
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
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@ -1269,7 +1269,8 @@ static int smu_smc_hw_setup(struct smu_context *smu)
* Set min deep sleep dce fclk with bootup value from vbios via
* SetMinDeepSleepDcefclk MSG.
*/
ret = smu_set_min_dcef_deep_sleep(smu);
ret = smu_set_min_dcef_deep_sleep(smu,
smu->smu_table.boot_values.dcefclk / 100);
if (ret)
return ret;
@ -1584,9 +1585,8 @@ int smu_display_configuration_change(struct smu_context *smu,
mutex_lock(&smu->mutex);
if (smu->ppt_funcs->set_deep_sleep_dcefclk)
smu->ppt_funcs->set_deep_sleep_dcefclk(smu,
display_config->min_dcef_deep_sleep_set_clk / 100);
smu_set_min_dcef_deep_sleep(smu,
display_config->min_dcef_deep_sleep_set_clk / 100);
for (index = 0; index < display_config->num_path_including_non_display; index++) {
if (display_config->displays[index].controller_id != 0)
@ -2482,8 +2482,7 @@ int smu_set_deep_sleep_dcefclk(struct smu_context *smu, int clk)
mutex_lock(&smu->mutex);
if (smu->ppt_funcs->set_deep_sleep_dcefclk)
ret = smu->ppt_funcs->set_deep_sleep_dcefclk(smu, clk);
ret = smu_set_min_dcef_deep_sleep(smu, clk);
mutex_unlock(&smu->mutex);

3
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
View File

@ -2590,7 +2590,6 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.populate_smc_tables = smu_v11_0_populate_smc_pptable,
.check_fw_version = smu_v11_0_check_fw_version,
.write_pptable = smu_v11_0_write_pptable,
.set_min_dcef_deep_sleep = NULL,
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
@ -2605,7 +2604,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
.init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
.enable_thermal_alert = smu_v11_0_enable_thermal_alert,
.disable_thermal_alert = smu_v11_0_disable_thermal_alert,
.set_deep_sleep_dcefclk = smu_v11_0_set_deep_sleep_dcefclk,
.set_min_dcef_deep_sleep = NULL,
.display_clock_voltage_request = smu_v11_0_display_clock_voltage_request,
.get_fan_control_mode = smu_v11_0_get_fan_control_mode,
.set_fan_control_mode = smu_v11_0_set_fan_control_mode,

3
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
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@ -510,7 +510,6 @@ struct pptable_funcs {
int (*powergate_sdma)(struct smu_context *smu, bool gate);
int (*set_gfx_cgpg)(struct smu_context *smu, bool enable);
int (*write_pptable)(struct smu_context *smu);
int (*set_min_dcef_deep_sleep)(struct smu_context *smu);
int (*set_driver_table_location)(struct smu_context *smu);
int (*set_tool_table_location)(struct smu_context *smu);
int (*notify_memory_pool_location)(struct smu_context *smu);
@ -527,7 +526,7 @@ struct pptable_funcs {
int (*init_max_sustainable_clocks)(struct smu_context *smu);
int (*enable_thermal_alert)(struct smu_context *smu);
int (*disable_thermal_alert)(struct smu_context *smu);
int (*set_deep_sleep_dcefclk)(struct smu_context *smu, uint32_t clk);
int (*set_min_dcef_deep_sleep)(struct smu_context *smu, uint32_t clk);
int (*set_active_display_count)(struct smu_context *smu, uint32_t count);
int (*store_cc6_data)(struct smu_context *smu, uint32_t separation_time,
bool cc6_disable, bool pstate_disable,

4
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
View File

@ -170,8 +170,6 @@ int smu_v11_0_check_fw_version(struct smu_context *smu);
int smu_v11_0_write_pptable(struct smu_context *smu);
int smu_v11_0_set_min_dcef_deep_sleep(struct smu_context *smu);
int smu_v11_0_set_driver_table_location(struct smu_context *smu);
int smu_v11_0_set_tool_table_location(struct smu_context *smu);
@ -215,7 +213,7 @@ int smu_v11_0_read_sensor(struct smu_context *smu,
enum amd_pp_sensors sensor,
void *data, uint32_t *size);
int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk);
int
smu_v11_0_display_clock_voltage_request(struct smu_context *smu,

3
drivers/gpu/drm/amd/powerplay/navi10_ppt.c
View File

@ -2426,7 +2426,6 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.populate_smc_tables = smu_v11_0_populate_smc_pptable,
.check_fw_version = smu_v11_0_check_fw_version,
.write_pptable = smu_v11_0_write_pptable,
.set_min_dcef_deep_sleep = smu_v11_0_set_min_dcef_deep_sleep,
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
@ -2441,7 +2440,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
.init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
.enable_thermal_alert = smu_v11_0_enable_thermal_alert,
.disable_thermal_alert = smu_v11_0_disable_thermal_alert,
.set_deep_sleep_dcefclk = smu_v11_0_set_deep_sleep_dcefclk,
.set_min_dcef_deep_sleep = smu_v11_0_set_min_deep_sleep_dcefclk,
.display_clock_voltage_request = smu_v11_0_display_clock_voltage_request,
.get_fan_control_mode = smu_v11_0_get_fan_control_mode,
.set_fan_control_mode = smu_v11_0_set_fan_control_mode,

3
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
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@ -2596,7 +2596,6 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.populate_smc_tables = smu_v11_0_populate_smc_pptable,
.check_fw_version = smu_v11_0_check_fw_version,
.write_pptable = smu_v11_0_write_pptable,
.set_min_dcef_deep_sleep = NULL,
.set_driver_table_location = smu_v11_0_set_driver_table_location,
.set_tool_table_location = smu_v11_0_set_tool_table_location,
.notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,
@ -2611,7 +2610,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
.init_max_sustainable_clocks = smu_v11_0_init_max_sustainable_clocks,
.enable_thermal_alert = smu_v11_0_enable_thermal_alert,
.disable_thermal_alert = smu_v11_0_disable_thermal_alert,
.set_deep_sleep_dcefclk = smu_v11_0_set_deep_sleep_dcefclk,
.set_min_dcef_deep_sleep = NULL,
.display_clock_voltage_request = smu_v11_0_display_clock_voltage_request,
.get_fan_control_mode = smu_v11_0_get_fan_control_mode,
.set_fan_control_mode = smu_v11_0_set_fan_control_mode,

4
drivers/gpu/drm/amd/powerplay/smu_internal.h
View File

@ -51,8 +51,8 @@
((smu)->ppt_funcs->check_fw_version ? (smu)->ppt_funcs->check_fw_version((smu)) : 0)
#define smu_write_pptable(smu) \
((smu)->ppt_funcs->write_pptable ? (smu)->ppt_funcs->write_pptable((smu)) : 0)
#define smu_set_min_dcef_deep_sleep(smu) \
((smu)->ppt_funcs->set_min_dcef_deep_sleep ? (smu)->ppt_funcs->set_min_dcef_deep_sleep((smu)) : 0)
#define smu_set_min_dcef_deep_sleep(smu, clk) \
((smu)->ppt_funcs->set_min_dcef_deep_sleep ? (smu)->ppt_funcs->set_min_dcef_deep_sleep((smu), (clk)) : 0)
#define smu_set_driver_table_location(smu) \
((smu)->ppt_funcs->set_driver_table_location ? (smu)->ppt_funcs->set_driver_table_location((smu)) : 0)
#define smu_set_tool_table_location(smu) \

12
drivers/gpu/drm/amd/powerplay/smu_v11_0.c
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@ -770,7 +770,7 @@ int smu_v11_0_write_pptable(struct smu_context *smu)
return ret;
}
int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
{
int ret;
@ -782,16 +782,6 @@ int smu_v11_0_set_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
return ret;
}
int smu_v11_0_set_min_dcef_deep_sleep(struct smu_context *smu)
{
struct smu_table_context *table_context = &smu->smu_table;
if (!table_context)
return -EINVAL;
return smu_v11_0_set_deep_sleep_dcefclk(smu, table_context->boot_values.dcefclk / 100);
}
int smu_v11_0_set_driver_table_location(struct smu_context *smu)
{
struct smu_table *driver_table = &smu->smu_table.driver_table;