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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-04 22:16:40 +07:00
brcmfmac: remove unused parameter of brcmf_sdcard_reg_write
The size parameter for brcmf_sdcard_reg_write is always 4. Remove it to make the code cleaner. Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> Reviewed-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -254,15 +254,14 @@ u32 brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr)
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}
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}
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u32 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
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u32 data)
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u32 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data)
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{
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int status;
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uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK;
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int err = 0;
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brcmf_dbg(INFO, "fun = 1, addr = 0x%x, uint%ddata = 0x%x\n",
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addr, size * 8, data);
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brcmf_dbg(INFO, "fun = 1, addr = 0x%x, uint32data = 0x%x\n",
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addr, data);
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if (bar0 != sdiodev->sbwad) {
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err = brcmf_sdcard_set_sbaddr_window(sdiodev, bar0);
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@ -273,18 +272,17 @@ u32 brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
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}
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addr &= SBSDIO_SB_OFT_ADDR_MASK;
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if (size == 4)
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addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
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addr |= SBSDIO_SB_ACCESS_2_4B_FLAG;
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status =
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brcmf_sdioh_request_word(sdiodev, SDIOH_WRITE, SDIO_FUNC_1,
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addr, &data, size);
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addr, &data, 4);
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sdiodev->regfail = (status != 0);
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if (status == 0)
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return 0;
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brcmf_dbg(ERROR, "error writing 0x%08x to addr 0x%04x size %d\n",
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data, addr, size);
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brcmf_dbg(ERROR, "error writing 0x%08x to addr 0x%04x\n",
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data, addr);
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return 0xFFFFFFFF;
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}
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@ -656,7 +656,7 @@ w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset, u32 *retryvar)
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do {
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brcmf_sdcard_reg_write(bus->sdiodev,
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bus->ci->c_inf[idx].base + reg_offset,
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sizeof(u32), regval);
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regval);
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} while (brcmf_sdcard_regfail(bus->sdiodev) &&
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(++(*retryvar) <= retry_limit));
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if (*retryvar) {
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@ -3782,8 +3782,7 @@ brcmf_sdbrcm_probe_attach(struct brcmf_sdio *bus, u32 regsva)
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reg_addr = bus->ci->c_inf[idx].base +
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offsetof(struct sdpcmd_regs, corecontrol);
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reg_val = brcmf_sdcard_reg_read(bus->sdiodev, reg_addr);
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brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, sizeof(u32),
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reg_val | CC_BPRESEN);
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brcmf_sdcard_reg_write(bus->sdiodev, reg_addr, reg_val | CC_BPRESEN);
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brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN);
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@ -171,7 +171,7 @@ brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow));
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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4, regdata | SSB_TMSLOW_REJECT);
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regdata | SSB_TMSLOW_REJECT);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow));
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@ -192,7 +192,7 @@ brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate)) |
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SSB_IMSTATE_REJECT;
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate), 4,
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CORE_SB(ci->c_inf[idx].base, sbimstate),
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regdata);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate));
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@ -204,7 +204,7 @@ brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev,
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/* set reset and reject while enabling the clocks */
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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(SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
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SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET));
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regdata = brcmf_sdcard_reg_read(sdiodev,
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@ -219,14 +219,14 @@ brcmf_sdio_sb_coredisable(struct brcmf_sdio_dev *sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate)) &
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~SSB_IMSTATE_REJECT;
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate), 4,
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CORE_SB(ci->c_inf[idx].base, sbimstate),
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regdata);
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}
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}
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/* leave reset and reject asserted */
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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(SSB_TMSLOW_REJECT | SSB_TMSLOW_RESET));
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udelay(1);
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}
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@ -246,14 +246,13 @@ brcmf_sdio_ai_coredisable(struct brcmf_sdio_dev *sdiodev,
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if ((regdata & BCMA_RESET_CTL_RESET) != 0)
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return;
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL,
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4, 0);
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL, 0);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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ci->c_inf[idx].wrapbase+BCMA_IOCTL);
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udelay(10);
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL,
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4, BCMA_RESET_CTL_RESET);
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BCMA_RESET_CTL_RESET);
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udelay(1);
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}
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@ -278,7 +277,7 @@ brcmf_sdio_sb_resetcore(struct brcmf_sdio_dev *sdiodev,
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* forcing them on throughout the core
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*/
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow));
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@ -289,18 +288,18 @@ brcmf_sdio_sb_resetcore(struct brcmf_sdio_dev *sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatehigh));
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if (regdata & SSB_TMSHIGH_SERR)
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 4, 0);
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CORE_SB(ci->c_inf[idx].base, sbtmstatehigh), 0);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate));
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if (regdata & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO))
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbimstate), 4,
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CORE_SB(ci->c_inf[idx].base, sbimstate),
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regdata & ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO));
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/* clear reset and allow it to propagate throughout the core */
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow), 4,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow));
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@ -309,7 +308,7 @@ brcmf_sdio_sb_resetcore(struct brcmf_sdio_dev *sdiodev,
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/* leave clock enabled */
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brcmf_sdcard_reg_write(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow),
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4, SSB_TMSLOW_CLOCK);
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SSB_TMSLOW_CLOCK);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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CORE_SB(ci->c_inf[idx].base, sbtmstatelow));
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udelay(1);
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@ -329,15 +328,15 @@ brcmf_sdio_ai_resetcore(struct brcmf_sdio_dev *sdiodev,
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/* now do initialization sequence */
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL,
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4, BCMA_IOCTL_FGC | BCMA_IOCTL_CLK);
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BCMA_IOCTL_FGC | BCMA_IOCTL_CLK);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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ci->c_inf[idx].wrapbase+BCMA_IOCTL);
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_RESET_CTL,
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4, 0);
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0);
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udelay(1);
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brcmf_sdcard_reg_write(sdiodev, ci->c_inf[idx].wrapbase+BCMA_IOCTL,
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4, BCMA_IOCTL_CLK);
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BCMA_IOCTL_CLK);
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regdata = brcmf_sdcard_reg_read(sdiodev,
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ci->c_inf[idx].wrapbase+BCMA_IOCTL);
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udelay(1);
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@ -522,9 +521,9 @@ int brcmf_sdio_chip_attach(struct brcmf_sdio_dev *sdiodev,
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brcmf_sdio_chip_buscoresetup(sdiodev, ci);
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->c_inf[0].base, gpiopullup), 4, 0);
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CORE_CC_REG(ci->c_inf[0].base, gpiopullup), 0);
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->c_inf[0].base, gpiopulldown), 4, 0);
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CORE_CC_REG(ci->c_inf[0].base, gpiopulldown), 0);
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*ci_ptr = ci;
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return 0;
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@ -591,7 +590,7 @@ brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr),
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4, 1);
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1);
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cc_data_temp = brcmf_sdcard_reg_read(sdiodev,
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CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr));
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cc_data_temp &= ~str_mask;
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@ -599,7 +598,7 @@ brcmf_sdio_chip_drivestrengthinit(struct brcmf_sdio_dev *sdiodev,
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cc_data_temp |= drivestrength_sel;
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brcmf_sdcard_reg_write(sdiodev,
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CORE_CC_REG(ci->c_inf[0].base, chipcontrol_addr),
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4, cc_data_temp);
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cc_data_temp);
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brcmf_dbg(INFO, "SDIO: %dmA drive strength selected, set to 0x%08x\n",
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drivestrength, cc_data_temp);
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@ -184,8 +184,7 @@ extern u32
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brcmf_sdcard_reg_read(struct brcmf_sdio_dev *sdiodev, u32 addr);
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extern u32
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brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, uint size,
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u32 data);
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brcmf_sdcard_reg_write(struct brcmf_sdio_dev *sdiodev, u32 addr, u32 data);
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/* Indicate if last reg read/write failed */
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extern bool brcmf_sdcard_regfail(struct brcmf_sdio_dev *sdiodev);
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